diff options
Diffstat (limited to 'plugins/arm/v7/helpers.h')
| -rw-r--r-- | plugins/arm/v7/helpers.h | 105 |
1 files changed, 105 insertions, 0 deletions
diff --git a/plugins/arm/v7/helpers.h b/plugins/arm/v7/helpers.h index ae759b8..a863a2d 100644 --- a/plugins/arm/v7/helpers.h +++ b/plugins/arm/v7/helpers.h @@ -32,11 +32,13 @@ #include "register.h" #include "operands/coproc.h" #include "operands/estate.h" +#include "operands/it.h" #include "operands/maccess.h" #include "operands/register.h" #include "operands/reglist.h" #include "operands/rotation.h" #include "operands/shift.h" +#include "operands/specreg.h" @@ -146,6 +148,13 @@ }) +#define ITCond(firstcond, mask) \ + ({ \ + GArchOperand *__result; \ + __result = g_armv7_itcond_operand_new(firstcond, mask); \ + __result; \ + }) + #define MemAccessOffset(base, off) \ ({ \ GArchOperand *__result; \ @@ -272,6 +281,72 @@ }) +#define SpecRegAPSR() \ + ({ \ + GArchOperand *__result; \ + __result = g_armv7_specreg_operand_new(SRT_APSR); \ + __result; \ + }) + + +#define SpecRegFromMask(mask) \ + ({ \ + GArchOperand *__result; \ + switch (mask) \ + { \ + case b10: \ + __result = g_armv7_specreg_operand_new(SRT_APSR_NZCVQ); \ + break; \ + case b1: \ + __result = g_armv7_specreg_operand_new(SRT_APSR_G); \ + break; \ + case b11: \ + __result = g_armv7_specreg_operand_new(SRT_APSR_NZCVQG); \ + break; \ + default: \ + __result = NULL; \ + break; \ + } \ + __result; \ + }) + + +#define SpecRegFromReg(reg) \ + ({ \ + GArchOperand *__result; \ + switch (reg) \ + { \ + case b0: \ + __result = g_armv7_specreg_operand_new(SRT_FPSID); \ + break; \ + case b1: \ + __result = g_armv7_specreg_operand_new(SRT_FPSCR); \ + break; \ + case b110: \ + __result = g_armv7_specreg_operand_new(SRT_MVFR1); \ + break; \ + case b111: \ + __result = g_armv7_specreg_operand_new(SRT_MVFR0); \ + break; \ + case b1000: \ + __result = g_armv7_specreg_operand_new(SRT_FPEXC); \ + break; \ + default: \ + __result = NULL; \ + break; \ + } \ + __result; \ + }) + + +#define SpecRegCSPSR(r) \ + ({ \ + GArchOperand *__result; \ + __result = g_armv7_specreg_operand_new(r == 1 ? SRT_SPSR : SRT_CPSR); \ + __result; \ + }) + + #define ThumbExpandImm(imm12) \ ({ \ GArchOperand *__result; \ @@ -314,6 +389,36 @@ }) +#define UncheckedWrittenBackReg(reg) \ + ({ \ + GArchOperand *__result; \ + if (reg == NULL) \ + __result = NULL; \ + else \ + __result = g_armv7_register_operand_new(G_ARMV7_REGISTER(reg)); \ + __result; \ + }) + + +#define WrittenBackReg(reg, writeback) \ + ({ \ + GArchOperand *__result; \ + GArmV7RegisterOperand *__armv7_op; \ + if (reg == NULL) \ + __result = NULL; \ + else \ + { \ + __result = g_armv7_register_operand_new(G_ARMV7_REGISTER(reg)); \ + if (__result != NULL && writeback == 1) \ + { \ + __armv7_op = G_ARMV7_REGISTER_OPERAND(__result); \ + g_armv7_register_operand_write_back(__armv7_op, true); \ + } \ + } \ + __result; \ + }) + + #define Zeros(i) \ ({ \ GArchOperand *__result; \ |