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Diffstat (limited to 'plugins/arm/v7/opdefs/A88423_vzip.d')
| -rw-r--r-- | plugins/arm/v7/opdefs/A88423_vzip.d | 309 |
1 files changed, 309 insertions, 0 deletions
diff --git a/plugins/arm/v7/opdefs/A88423_vzip.d b/plugins/arm/v7/opdefs/A88423_vzip.d new file mode 100644 index 0000000..b289dd8 --- /dev/null +++ b/plugins/arm/v7/opdefs/A88423_vzip.d @@ -0,0 +1,309 @@ + +/* Chrysalide - Outil d'analyse de fichiers binaires + * ##FILE## - traduction d'instructions ARMv7 + * + * Copyright (C) 2017 Cyrille Bagard + * + * This file is part of Chrysalide. + * + * Chrysalide is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * Chrysalide is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Chrysalide. If not, see <http://www.gnu.org/licenses/>. + */ + + +@title VZIP + +@id 348 + +@desc { + + Vector Zip interleaves the elements of two vectors. See Table A8-15 and Table A8-16 for examples of the operation. The elements of the vectors can be 8-bit, 16-bit, or 32-bit. There is no distinction between data types. Depending on settings in the CPACR, NSACR, and HCPTR registers, and the security state and mode in which the instruction is executed, an attempt to execute the instruction might be UNDEFINED, or trapped to Hyp mode. Summary of access controls for Advanced SIMD functionality on page B1-1232 summarizes these controls. ARM deprecates the conditional execution of any Advanced SIMD instruction encoding that is not also available as a VFP instruction encoding, see Conditional execution on page A8-288. + +} + +@encoding (T1) { + + @word 1 1 1 1 1 1 1 1 1 D(1) 1 1 size(2) 1 0 Vd(4) 0 0 0 1 1 Q(1) M(1) 0 Vm(4) + + @syntax { + + @subid 1967 + + @assert { + + Q == 1 + size == 0 + + } + + @conv { + + qwvec_D = QuadWordVector(D:Vd) + qwvec_M = QuadWordVector(M:Vm) + + } + + @asm vzip.8 qwvec_D qwvec_M + + } + + @syntax { + + @subid 1968 + + @assert { + + Q == 1 + size == 1 + + } + + @conv { + + qwvec_D = QuadWordVector(D:Vd) + qwvec_M = QuadWordVector(M:Vm) + + } + + @asm vzip.16 qwvec_D qwvec_M + + } + + @syntax { + + @subid 1969 + + @assert { + + Q == 1 + size == 10 + + } + + @conv { + + qwvec_D = QuadWordVector(D:Vd) + qwvec_M = QuadWordVector(M:Vm) + + } + + @asm vzip.32 qwvec_D qwvec_M + + } + + @syntax { + + @subid 1970 + + @assert { + + Q == 0 + size == 0 + + } + + @conv { + + dwvec_D = DoubleWordVector(D:Vd) + dwvec_M = DoubleWordVector(M:Vm) + + } + + @asm vzip.8 dwvec_D dwvec_M + + } + + @syntax { + + @subid 1971 + + @assert { + + Q == 0 + size == 1 + + } + + @conv { + + dwvec_D = DoubleWordVector(D:Vd) + dwvec_M = DoubleWordVector(M:Vm) + + } + + @asm vzip.16 dwvec_D dwvec_M + + } + + @syntax { + + @subid 1972 + + @assert { + + Q == 0 + size == 10 + + } + + @conv { + + dwvec_D = DoubleWordVector(D:Vd) + dwvec_M = DoubleWordVector(M:Vm) + + } + + @asm vzip.32 dwvec_D dwvec_M + + } + +} + +@encoding (A1) { + + @word 1 1 1 1 1 1 1 1 1 D(1) 1 1 size(2) 1 0 Vd(4) 0 0 0 1 1 Q(1) M(1) 0 Vm(4) + + @syntax { + + @subid 1973 + + @assert { + + Q == 1 + size == 0 + + } + + @conv { + + qwvec_D = QuadWordVector(D:Vd) + qwvec_M = QuadWordVector(M:Vm) + + } + + @asm vzip.8 qwvec_D qwvec_M + + } + + @syntax { + + @subid 1974 + + @assert { + + Q == 1 + size == 1 + + } + + @conv { + + qwvec_D = QuadWordVector(D:Vd) + qwvec_M = QuadWordVector(M:Vm) + + } + + @asm vzip.16 qwvec_D qwvec_M + + } + + @syntax { + + @subid 1975 + + @assert { + + Q == 1 + size == 10 + + } + + @conv { + + qwvec_D = QuadWordVector(D:Vd) + qwvec_M = QuadWordVector(M:Vm) + + } + + @asm vzip.32 qwvec_D qwvec_M + + } + + @syntax { + + @subid 1976 + + @assert { + + Q == 0 + size == 0 + + } + + @conv { + + dwvec_D = DoubleWordVector(D:Vd) + dwvec_M = DoubleWordVector(M:Vm) + + } + + @asm vzip.8 dwvec_D dwvec_M + + } + + @syntax { + + @subid 1977 + + @assert { + + Q == 0 + size == 1 + + } + + @conv { + + dwvec_D = DoubleWordVector(D:Vd) + dwvec_M = DoubleWordVector(M:Vm) + + } + + @asm vzip.16 dwvec_D dwvec_M + + } + + @syntax { + + @subid 1978 + + @assert { + + Q == 0 + size == 10 + + } + + @conv { + + dwvec_D = DoubleWordVector(D:Vd) + dwvec_M = DoubleWordVector(M:Vm) + + } + + @asm vzip.32 dwvec_D dwvec_M + + } + +} + |