summaryrefslogtreecommitdiff
path: root/plugins/arm/v7/thumb_32.c
diff options
context:
space:
mode:
Diffstat (limited to 'plugins/arm/v7/thumb_32.c')
-rw-r--r--plugins/arm/v7/thumb_32.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/plugins/arm/v7/thumb_32.c b/plugins/arm/v7/thumb_32.c
index 74c2a84..ae5f1fb 100644
--- a/plugins/arm/v7/thumb_32.c
+++ b/plugins/arm/v7/thumb_32.c
@@ -27,7 +27,7 @@
#include <stdint.h>
-#include <arch/undefined.h>
+#include <arch/instructions/undefined.h>
#include <common/bconst.h>
@@ -216,7 +216,7 @@ GArchInstruction *process_armv7_thumb_32_instruction_set_encoding(uint32_t raw)
result = process_armv7_thumb_32_load_word(raw);
else if ((op2 & b1100111) == b0000111)
- result = g_undef_instruction_new(IBS_UNDEFINED);
+ result = g_undef_instruction_new(IEB_UNDEFINED);
else if ((op2 & b1110001) == b0010000)
result = process_armv7_thumb_32_advanced_simd_element_or_structure_load_store_instructions(raw);
@@ -1023,7 +1023,7 @@ static GArchInstruction *process_armv7_thumb_32_load_halfword_memory_hints(uint3
result = armv7_read_thumb_32_instr_a8_ldrsh_literal(raw);
else/* if (rt == b1111)*/
- result = g_undef_instruction_new(IBS_NOP);
+ result = g_undef_instruction_new(IEB_NOP);
}
@@ -1078,10 +1078,10 @@ static GArchInstruction *process_armv7_thumb_32_load_halfword_memory_hints(uint3
result = armv7_read_thumb_32_instr_a8_ldrsht(raw);
else if (op2 == b000000 && rt == b1111)
- result = g_undef_instruction_new(IBS_NOP);
+ result = g_undef_instruction_new(IEB_NOP);
else if ((op2 & b111100) == b110000 && rt == b1111)
- result = g_undef_instruction_new(IBS_NOP);
+ result = g_undef_instruction_new(IEB_NOP);
}
@@ -1091,7 +1091,7 @@ static GArchInstruction *process_armv7_thumb_32_load_halfword_memory_hints(uint3
result = armv7_read_thumb_32_instr_a8_ldrsh_immediate(raw);
else/* if (rt == b1111)*/
- result = g_undef_instruction_new(IBS_NOP);
+ result = g_undef_instruction_new(IEB_NOP);
}
@@ -2243,7 +2243,7 @@ static GArchInstruction *process_armv7_thumb_32_coprocessor_advanced_simd_and_fl
op = (raw >> 4) & 0x1;
if ((op1 & b111110) == b000000)
- result = g_undef_instruction_new(IBS_UNDEFINED);
+ result = g_undef_instruction_new(IEB_UNDEFINED);
else if ((op1 & b110000) == b110000)
result = process_armv7_thumb_32_advanced_simd_data_processing_instructions(raw);
@@ -3142,7 +3142,7 @@ static GArchInstruction *process_armv7_thumb_32_one_register_and_a_modified_imme
result = armv7_read_thumb_32_instr_a8_vmov_immediate(raw);
else if (cmode == b1111)
- result = g_undef_instruction_new(IBS_UNDEFINED);
+ result = g_undef_instruction_new(IEB_UNDEFINED);
}