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-rw-r--r--src/arch/arm/v7/helpers.h236
1 files changed, 201 insertions, 35 deletions
diff --git a/src/arch/arm/v7/helpers.h b/src/arch/arm/v7/helpers.h
index 3b14837..c014682 100644
--- a/src/arch/arm/v7/helpers.h
+++ b/src/arch/arm/v7/helpers.h
@@ -25,18 +25,214 @@
#define _ARCH_ARM_V7_HELPERS_H
+#include "cregister.h"
#include "pseudo.h"
+#include "operands/coproc.h"
+#include "operands/estate.h"
+#include "operands/limitation.h"
#include "operands/maccess.h"
#include "operands/offset.h"
#include "operands/reglist.h"
#include "operands/rotation.h"
#include "operands/shift.h"
+#include "../register.h"
#include "../../operand.h"
+#define BarrierLimitation(opt) \
+ ({ \
+ GArchOperand *__result; \
+ __result = g_armv7_limitation_operand_new(opt); \
+ __result; \
+ })
+
+
+#define BitDiff(msb, lsb) \
+ ({ \
+ GArchOperand *__result; \
+ uint32_t __width; \
+ __width = g_imm_operand_get_raw_value(G_IMM_OPERAND(msb)); \
+ __width -= g_imm_operand_get_raw_value(G_IMM_OPERAND(lsb)); \
+ __width += 1; \
+ __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __width); \
+ __result; \
+ })
+
+
+#define BuildImm8(val) \
+ ({ \
+ GArchOperand *__result; \
+ __result = g_imm_operand_new_from_value(MDS_8_BITS_UNSIGNED, (uint8_t)val); \
+ __result; \
+ })
+
+
+#define BuildImm16(val) \
+ ({ \
+ GArchOperand *__result; \
+ __result = g_imm_operand_new_from_value(MDS_16_BITS_UNSIGNED, (uint16_t)val); \
+ __result; \
+ })
+
+
+#define CoProcessor(idx) \
+ ({ \
+ GArchOperand *__result; \
+ __result = g_armv7_coproc_operand_new(idx); \
+ __result; \
+ })
+
+
+#define CRegister(idx) \
+ ({ \
+ GArchOperand *__result; \
+ GArmV7CRegister *__reg; \
+ __reg = g_armv7_cregister_new(idx); \
+ if (__reg == NULL) \
+ __result = NULL; \
+ else \
+ __result = g_register_operand_new(G_ARCH_REGISTER(__reg)); \
+ __result; \
+ })
+
+
+#define IncWidth(widthm1) \
+ ({ \
+ GArchOperand *__result; \
+ uint32_t __width; \
+ __width = widthm1 + 1; \
+ __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __width); \
+ __result; \
+ })
+
+
+#define DecodeImmShift(type, imm5) \
+ ({ \
+ GArchOperand *__result; \
+ SRType __shift_t; \
+ uint32_t __shift_n; \
+ GArchOperand *__op_n; \
+ if (!armv7_decode_imm_shift(type, imm5, &__shift_t, &__shift_n)) \
+ __result = NULL; \
+ else \
+ { \
+ __op_n = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __shift_n); \
+ __result = g_armv7_shift_operand_new(__shift_t, __op_n); \
+ } \
+ __result; \
+ })
+
+
+#define EndianState(big) \
+ ({ \
+ GArchOperand *__result; \
+ __result = g_armv7_endian_operand_new(big); \
+ __result; \
+ })
+
+
+#define MakeMemoryAccess(base, off, shift, index, add, wback) \
+ ({ \
+ GArchOperand *__result; \
+ GArchOperand *__offset; \
+ if (off != NULL) \
+ __offset = g_armv7_offset_operand_new(add, off); \
+ else \
+ __offset = NULL; \
+ __result = g_armv7_maccess_operand_new(base, __offset, shift, index, wback); \
+ __result; \
+ })
+
+
+#define NextRegister(prev) \
+ ({ \
+ GRegisterOperand *__prev_op; \
+ GArchRegister *__reg; \
+ uint8_t __id; \
+ __prev_op = G_REGISTER_OPERAND(prev); \
+ __reg = g_register_operand_get_register(__prev_op); \
+ __id = g_arm_register_get_index(G_ARM_REGISTER(__reg)); \
+ Register(__id + 1); \
+ })
+
+
+#define RawValue(val) \
+ ({ \
+ GArchOperand *__result; \
+ __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, (uint32_t)val); \
+ __result; \
+ })
+
+
+#define Register(idx) \
+ ({ \
+ GArchOperand *__result; \
+ GArmV7Register *__reg; \
+ __reg = g_armv7_register_new(idx); \
+ if (__reg == NULL) \
+ __result = NULL; \
+ else \
+ __result = g_register_operand_new(G_ARCH_REGISTER(__reg)); \
+ __result; \
+ })
+
+
+#define RegisterShift(shift_t, rs) \
+ ({ \
+ GArchOperand *__result; \
+ GArchOperand *__reg; \
+ __reg = Register(rs); \
+ if (__reg == NULL) \
+ __result = NULL; \
+ else \
+ __result = g_armv7_shift_operand_new(shift_t, __reg); \
+ __result; \
+ })
+
+
+#define Rotation(val5) \
+ ({ \
+ GArchOperand *__result; \
+ uint8_t __rot; \
+ GArchOperand *__rot_op; \
+ __rot = val5; \
+ __rot_op = g_imm_operand_new_from_value(MDS_8_BITS_UNSIGNED, __rot); \
+ __result = g_armv7_rotation_operand_new(__rot_op); \
+ if (__result == NULL) \
+ g_object_unref(G_OBJECT(__rot_op)); \
+ __result; \
+ })
+
+
+#define UInt(val) \
+ ({ \
+ GArchOperand *__result; \
+ __result = g_imm_operand_new_from_value(MDS_8_BITS_UNSIGNED, (uint8_t)val); \
+ __result; \
+ })
+
+
+
+
+//#define DecodeImmShift(raw_type, raw_imm5);
+//g_armv7_shift_operand_new(SRType type, GArchOperand *value)
+
+
+
+//#define MakeMemoryAccess(base, off, shift, index, add, wback) NULL
+
+//g_armv7_maccess_operand_new(GArchOperand *base, GArchOperand *offset, GArchOperand *shift, bool indexed, bool writeb)
+
+//g_armv7_offset_operand_new(add, off)
+
+
+
+
+////////////////////
+
#define Imm16(imm16) \
({ \
GArchOperand *__result; \
@@ -105,23 +301,6 @@
__result; \
})
-#define DecodeImmShift(type, imm5) \
- ({ \
- GArchOperand *__result; \
- SRType __shift_t; \
- uint32_t __shift_n; \
- GArchOperand *__op_n; \
- if (!armv7_decode_imm_shift(type, imm5, &__shift_t, &__shift_n)) \
- __result = NULL; \
- else \
- { \
- __op_n = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __shift_n); \
- __result = g_armv7_shift_operand_new(__shift_t, __op_n); \
- } \
- __result; \
- })
-
-
#if 0
// DecodeRegShift()
@@ -137,12 +316,12 @@ return shift_t;
-#define ZeroExtend(x, n, i) \
+#define ZeroExtend(x, i) \
({ \
MemoryDataSize __mds; \
uint ## i ## _t __val; \
__mds = MDS_ ## i ## _BITS_UNSIGNED; \
- __val = armv7_zero_extend(x, n, i); \
+ __val = armv7_zero_extend(x, 0/**/, i); \
g_imm_operand_new_from_value(__mds, __val); \
})
@@ -180,14 +359,14 @@ return shift_t;
#define _MakeMemoryAccess(base, off, wr) \
MakeShiftedMemoryAccess(base, off, NULL, wr)
-
+/*
#define MakeMemoryAccess(base, off, add, wr) \
({ \
GArchOperand *__off; \
__off = MakeAccessOffset(add, off); \
_MakeMemoryAccess(base, __off, wr); \
})
-
+*/
#define MakeMemoryNotIndexed(base, wr) \
_MakeMemoryAccess(base, NULL, wr)
@@ -196,19 +375,6 @@ return shift_t;
-#define BuildRotation(val5) \
- ({ \
- GArchOperand *__result; \
- uint8_t __rot; \
- GArchOperand *__rot_op; \
- __rot = val5; \
- __rot_op = g_imm_operand_new_from_value(MDS_8_BITS_UNSIGNED, __rot); \
- __result = g_armv7_rotation_operand_new(__rot_op); \
- if (__result == NULL) \
- g_object_unref(G_OBJECT(__rot_op)); \
- __result; \
- })
-
@@ -266,7 +432,7 @@ GArchOperand *sign_extend_armv7_imm(uint32_t, bool, unsigned int);
GArchOperand *thumb_expand_armv7_imm(uint32_t);
/* Crée un opérande représentant un registre ARMv7. */
-GArchOperand *translate_armv7_register(uint8_t);
+//GArchOperand *translate_armv7_register(uint8_t);
/* Réalise un simple transtypage de valeur entière. */
GArchOperand *zero_extend_armv7_imm(uint32_t, unsigned int);
generated by cgit v0.11.2-87-g4458 at 2024-05-10 00:19:10 (GMT)