diff options
Diffstat (limited to 'src/arch/arm/v7/opdefs/b_A8818.d')
| -rw-r--r-- | src/arch/arm/v7/opdefs/b_A8818.d | 158 |
1 files changed, 70 insertions, 88 deletions
diff --git a/src/arch/arm/v7/opdefs/b_A8818.d b/src/arch/arm/v7/opdefs/b_A8818.d index 55b123e..9e27753 100644 --- a/src/arch/arm/v7/opdefs/b_A8818.d +++ b/src/arch/arm/v7/opdefs/b_A8818.d @@ -2,7 +2,7 @@ /* Chrysalide - Outil d'analyse de fichiers binaires * ##FILE## - traduction d'instructions ARMv7 * - * Copyright (C) 2014 Cyrille Bagard + * Copyright (C) 2015 Cyrille Bagard * * This file is part of Chrysalide. * @@ -23,153 +23,135 @@ @title B -@encoding(t1) { +@desc Branch causes a branch to a target address. - @half 1 1 0 1 cond(4) imm8(8) +@encoding (t1) { - @syntax {c} <label> + @half 1 1 0 1 cond(4) imm8(8) - @conv { + @syntax <imm32> - c = Condition(cond) - label = SignExtend(imm8:'0', imm8 & 0x80, 32) + @conv { - } + imm32 = SignExtend(imm8:'0', imm8 & 0x80, 32) - @hooks { + } - fetch = help_fetching_with_instruction_b_from_thumb - link = handle_arm_conditional_branch_as_link - post = post_process_branch_instructions + @rules { - } + chk_call StoreCondition(cond) - @rules { + } - //if cond == '1110' then UNDEFINED; - //if cond == '1111' then SEE SVC; - //chk_call SetInsFlag(AIF_RETURN_POINT) + @hooks { - } + fetch = help_fetching_with_instruction_b_from_thumb + link = handle_arm_conditional_branch_as_link + post = post_process_branch_instructions -} - -@encoding(t2) { + } - @half 1 1 1 0 0 imm11(11) - - @syntax <label> +} - @conv { +@encoding (t2) { - label = SignExtend(imm11:'0', imm11 & 0x400, 32) + @half 1 1 1 0 0 imm11(11) - } + @syntax <imm32> - @hooks { + @conv { - fetch = help_fetching_with_instruction_b_from_thumb - link = handle_arm_conditional_branch_as_link - post = post_process_branch_instructions + imm32 = SignExtend(imm11:'0', imm11 & 0x400, 32) - } + } - @rules { + @hooks { - //if InITBlock() && !LastInITBlock() then UNPREDICTABLE; - //chk_call SetInsFlag(AIF_RETURN_POINT) + fetch = help_fetching_with_instruction_b_from_thumb + link = handle_arm_conditional_branch_as_link + post = post_process_branch_instructions - } + } } -@encoding(T3) { +@encoding (T3) { - @word 1 1 1 1 0 S(1) cond(4) imm6(6) 1 0 J1(1) 0 J2(1) imm11(11) + @word 1 1 1 1 0 S(1) cond(4) imm6(6) 1 0 J1(1) 0 J2(1) imm11(11) - @syntax {c} ".W" <label> + @syntax ".W" <imm32> - @conv { + @conv { - c = Condition(cond) - label = SignExtend(S:J2:J1:imm6:imm11:'0', S, 32) + imm32 = SignExtend(S:J2:J1:imm6:imm11:'0', S & 0x1, 32) - } + } - @hooks { + @rules { - fetch = help_fetching_with_instruction_b_from_thumb - link = handle_arm_conditional_branch_as_link - post = post_process_branch_instructions + chk_call StoreCondition(cond) - } + } - @rules { + @hooks { - //if cond<3:1> == '111' then SEE "Related encodings"; - //if InITBlock() then UNPREDICTABLE; - //chk_call SetInsFlag(AIF_RETURN_POINT) + fetch = help_fetching_with_instruction_b_from_thumb + link = handle_arm_conditional_branch_as_link + post = post_process_branch_instructions - } + } } -@encoding(T4) { +@encoding (T4) { - @word 1 1 1 1 0 S(1) imm10(10) 1 0 J1(1) 1 J2(1) imm11(11) + @word 1 1 1 1 0 S(1) imm10(10) 1 0 J1(1) 1 J2(1) imm11(11) - @syntax "b.W" <label> + @syntax ".W" <imm32> - @conv { + @conv { - I1 = NOT(J1 EOR S) - I2 = NOT(J2 EOR S) - label = SignExtend(S:I1:I2:imm10:imm11:'0', S, 32) + I1 = NOT(J1 EOR S) + I2 = NOT(J2 EOR S) + imm32 = SignExtend(S:I1:I2:imm10:imm11:'0', S & 0x1, 32) - } + } - @hooks { + @hooks { - fetch = help_fetching_with_instruction_b_from_thumb - link = handle_arm_conditional_branch_as_link - post = post_process_branch_instructions + fetch = help_fetching_with_instruction_b_from_thumb + link = handle_arm_conditional_branch_as_link + post = post_process_branch_instructions - } - - @rules { - - //if InITBlock() && !LastInITBlock() then UNPREDICTABLE; - //chk_call SetInsFlag(AIF_RETURN_POINT) - - } + } } -@encoding(A1) { +@encoding (A1) { - @word cond(4) 1 0 1 0 imm24(24) + @word cond(4) 1 0 1 0 imm24(24) - @syntax {c} <label> + @syntax <imm32> - @conv { + @conv { - c = Condition(cond) - label = SignExtend(imm24:'00', imm24 & 0x800000, 32) + imm32 = SignExtend(imm24:'00', imm24 & 0x800000, 32) - } + } - @hooks { + @rules { - fetch = help_fetching_with_instruction_b_from_arm - link = handle_arm_conditional_branch_as_link - post = post_process_branch_instructions + chk_call StoreCondition(cond) - } + } - @rules { + @hooks { - //chk_call SetInsFlag(AIF_RETURN_POINT) + fetch = help_fetching_with_instruction_b_from_arm + link = handle_arm_conditional_branch_as_link + post = post_process_branch_instructions - } + } } + |