diff options
Diffstat (limited to 'src/arch/arm/v7/opdefs/bl_A8825.d')
| -rw-r--r-- | src/arch/arm/v7/opdefs/bl_A8825.d | 123 |
1 files changed, 54 insertions, 69 deletions
diff --git a/src/arch/arm/v7/opdefs/bl_A8825.d b/src/arch/arm/v7/opdefs/bl_A8825.d index c2eb7bd..da0def4 100644 --- a/src/arch/arm/v7/opdefs/bl_A8825.d +++ b/src/arch/arm/v7/opdefs/bl_A8825.d @@ -2,7 +2,7 @@ /* Chrysalide - Outil d'analyse de fichiers binaires * ##FILE## - traduction d'instructions ARMv7 * - * Copyright (C) 2014 Cyrille Bagard + * Copyright (C) 2015 Cyrille Bagard * * This file is part of Chrysalide. * @@ -23,118 +23,103 @@ @title BL, BLX (immediate) -@encoding(T1) { +@desc Branch with Link calls a subroutine at a PC-relative address. Branch with Link and Exchange Instruction Sets (immediate) calls a subroutine at a PC-relative address, and changes instruction set from ARM to Thumb, or from Thumb to ARM. - @word 1 1 1 1 0 S(1) imm10(10) 1 1 J1(1) 1 J2(1) imm11(11) +@encoding (T1) { - @syntax <imm32> + @word 1 1 1 1 0 S(1) imm10(10) 1 1 J1(1) 1 J2(1) imm11(11) - @conv { + @syntax <imm32> - I1 = NOT(J1 EOR S) - I2 = NOT(J2 EOR S) - imm32 = SignExtend(S:I1:I2:imm10:imm11:'0', S, 32) + @conv { - } + I1 = NOT(J1 EOR S) + I2 = NOT(J2 EOR S) + imm32 = SignExtend(S:I1:I2:imm10:imm11:'0', S & 0x1, 32) - @hooks { + } - fetch = help_fetching_with_instruction_bl_from_thumb - link = handle_call_as_link - post = post_process_branch_and_link_instructions + @hooks { - } + fetch = help_fetching_with_instruction_bl_from_thumb + link = handle_call_as_link + post = post_process_branch_and_link_instructions - @rules { - - //chk_call SetInsFlag(AIF_RETURN_POINT) - - } + } } -@encoding(T2) { - - @word 1 1 1 1 0 S(1) imm10H(10) 1 1 J1(1) 0 J2(1) imm10L(10) H(1) - - @syntax "blx" <imm32> - - @conv { +@encoding (T2) { - I1 = NOT(J1 EOR S) - I2 = NOT(J2 EOR S) - imm32 = SignExtend(S:I1:I2:imm10H:imm10L:'00', S, 32) + @word 1 1 1 1 0 S(1) imm10H(10) 1 1 J1(1) 0 J2(1) imm10L(10) H(1) - } + @syntax "blx" <imm32> - @hooks { + @conv { - fetch = help_fetching_with_instruction_blx_from_thumb - link = handle_call_as_link - post = post_process_branch_and_link_instructions + I1 = NOT(J1 EOR S) + I2 = NOT(J2 EOR S) + imm32 = SignExtend(S:I1:I2:imm10H:imm10L:'00', S & 0x1, 32) - } + } - @rules { + @hooks { - //chk_call SetInsFlag(AIF_RETURN_POINT) + fetch = help_fetching_with_instruction_blx_from_thumb + link = handle_call_as_link + post = post_process_branch_and_link_instructions - } + } } -@encoding(A1) { +@encoding (A1) { - @word cond(4) 1 0 1 1 imm24(24) + @word cond(4) 1 0 1 1 imm24(24) - @syntax <imm32> + @syntax <imm32> - @conv { + @conv { - imm32 = SignExtend(imm24:'00', imm24 & 0x800000, 32) + imm32 = SignExtend(imm24:'00', imm24 & 0x800000, 32) - } + } - @hooks { + @rules { - fetch = help_fetching_with_instruction_bl_from_arm - link = handle_call_as_link - post = post_process_branch_and_link_instructions + chk_call StoreCondition(cond) - } + } - @rules { + @hooks { - //chk_call SetInsFlag(AIF_RETURN_POINT) + fetch = help_fetching_with_instruction_bl_from_arm + link = handle_call_as_link + post = post_process_branch_and_link_instructions - } + } } -@encoding(A2) { +@encoding (A2) { - @word 1 1 1 1 1 0 1 H(1) imm24(24) + @word 1 1 1 1 1 0 1 H(1) imm24(24) - @syntax "blx" <imm32> + @syntax "blx" <imm32> - @conv { + @conv { - imm32 = SignExtend(imm24:H:'0', imm24 & 0x800000, 32) + imm32 = SignExtend(imm24:H:'0', imm24 & 0x800000, 32) - } + } - @hooks { + @hooks { - fetch = help_fetching_with_instruction_blx_from_arm - link = handle_call_as_link - post = post_process_branch_and_link_instructions + fetch = help_fetching_with_instruction_blx_from_arm + link = handle_call_as_link + post = post_process_branch_and_link_instructions - } - - @rules { - - //chk_call SetInsFlag(AIF_RETURN_POINT) - - } + } } + |