1 files changed, 18 insertions, 48 deletions
diff --git a/src/arch/arm/v7/opdefs/ldr_A8863.d b/src/arch/arm/v7/opdefs/ldr_A8863.d
index b2f7f84..0d0ce1f 100644
--- a/src/arch/arm/v7/opdefs/ldr_A8863.d
+++ b/src/arch/arm/v7/opdefs/ldr_A8863.d
@@ -2,7 +2,7 @@
 /* Chrysalide - Outil d'analyse de fichiers binaires
  * ##FILE## - traduction d'instructions ARMv7
  *
- * Copyright (C) 2014 Cyrille Bagard
+ * Copyright (C) 2015 Cyrille Bagard
  *
  *  This file is part of Chrysalide.
  *
@@ -23,61 +23,31 @@
 
 @title LDR (immediate, ARM)
 
-@encoding(A11) {
+@desc Load Register (immediate) calculates an address from a base register value and an immediate offset, loads a word from memory, and writes it to a register. It can use offset, post-indexed, or pre-indexed addressing. For information about memory accesses see Memory accesses on page A8-294.
 
-    @word cond(4) 0 1 0 1 U(1) 0 W(1) 1 Rn(4) Rt(4) imm12(12)
+@encoding (A1) {
 
-    @syntax <Rgt> <access>
+	@word cond(4) 0 1 0 P(1) U(1) 0 W(1) 1 Rn(4) Rt(4) imm12(12)
 
-    @conv {
+	@syntax <reg_T> <mem_access>
 
-        Rgt = Register(Rt)
-        Rgn = Register(Rn)
-        imm32 = ZeroExtend(imm12, 12, 32);
-        access = MakeMemoryAccess(Rgn, imm32, U, 1)
+	@conv {
 
-    }
+		reg_T = Register(Rt)
+		reg_N = Register(Rn)
+		imm32 = ZeroExtend(imm12, 32)
+		index = (P == '1')
+		add = (U == '1')
+		wback = (P == '0') || (W == '1')
+		mem_access = MakeMemoryAccess(reg_N, imm32, NULL, index, add, wback)
 
-    @rules {
+	}
 
-        //if Rn == '1111' then SEE LDR (literal);
-        //if P == '0' && W == '1' then SEE LDRT;
-        //if Rn == '1101' && P == '0' && U == '1' && W == '0' && imm12 == '000000000100' then SEE POP;
-        //t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
-        //index = (P == '1'); add = (U == '1'); wback = (P == '0') || (W == '1');
-        //if wback && n == t then UNPREDICTABLE;
-        if (Rt == '1111'); chk_call SetInsFlag(AIF_RETURN_POINT)
+	@rules {
 
-    }
+		chk_call StoreCondition(cond)
 
-}
-
-@encoding(A12) {
-
-    @word cond(4) 0 1 0 0 U(1) 0 W(1) 1 Rn(4) Rt(4) imm12(12)
-
-    @syntax <Rgt> <base> <offset>
-
-    @conv {
-
-        Rgt = Register(Rt)
-        Rgn = Register(Rn)
-        imm32 = ZeroExtend(imm12, 12, 32);
-        base = MakeMemoryNotIndexed(Rgn, W)
-        offset = MakeAccessOffset(U, imm32)
-
-    }
-
-    @rules {
-
-        //if Rn == '1111' then SEE LDR (literal);
-        //if P == '0' && W == '1' then SEE LDRT;
-        //if Rn == '1101' && P == '0' && U == '1' && W == '0' && imm12 == '000000000100' then SEE POP;
-        //t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
-        //index = (P == '1'); add = (U == '1'); wback = (P == '0') || (W == '1');
-        //if wback && n == t then UNPREDICTABLE;
-        if (Rt == '1111'); chk_call SetInsFlag(AIF_RETURN_POINT)
-
-    }
+	}
 
 }
+