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-rw-r--r--src/arch/arm/v7/opdefs/mvn_A88115.d51
1 files changed, 27 insertions, 24 deletions
diff --git a/src/arch/arm/v7/opdefs/mvn_A88115.d b/src/arch/arm/v7/opdefs/mvn_A88115.d
index 32e96b3..2955439 100644
--- a/src/arch/arm/v7/opdefs/mvn_A88115.d
+++ b/src/arch/arm/v7/opdefs/mvn_A88115.d
@@ -2,7 +2,7 @@
/* Chrysalide - Outil d'analyse de fichiers binaires
* ##FILE## - traduction d'instructions ARMv7
*
- * Copyright (C) 2014 Cyrille Bagard
+ * Copyright (C) 2015 Cyrille Bagard
*
* This file is part of Chrysalide.
*
@@ -23,47 +23,50 @@
@title MVN (immediate)
-@encoding(T1) {
+@desc Bitwise NOT (immediate) writes the bitwise inverse of an immediate value to the destination register. It can optionally update the condition flags based on the value.
- @word 1 1 1 1 0 i(1) 0 0 0 1 1 S(1) 1 1 1 1 0 imm3(3) Rd(4) imm8(8)
+@encoding (T1) {
- @syntax {S} <Rd> <const>
+ @word 1 1 1 1 0 i(1) 0 0 0 1 1 S(1) 1 1 1 1 0 imm3(3) Rd(4) imm8(8)
- @conv {
+ @syntax <reg_D> <imm32>
- S = SetFlags(S)
- Rd = Register(Rd)
- const = ThumbExpandImm_C(i:imm3:imm8, 0)
+ @conv {
- }
+ reg_D = Register(Rd)
+ setflags = (S == '1')
+ imm32 = ThumbExpandImm_C(i:imm3:imm8, 0)
- @rules {
+ }
- //if (d IN {13,15}) ; unpredictable
+ @rules {
- }
+ if (setflags); chk_call ExtendKeyword("s")
+
+ }
}
-@encoding(A1) {
+@encoding (A1) {
- @word cond(4) 0 0 1 1 1 1 1 S(1) 0 0 0 0 Rd(4) imm12(12)
+ @word cond(4) 0 0 1 1 1 1 1 S(1) 0 0 0 0 Rd(4) imm12(12)
- @syntax {S} {c} <Rd> <const>
+ @syntax <reg_D> <imm32>
- @conv {
+ @conv {
- S = SetFlags(S)
- c = Condition(cond)
- Rd = Register(Rd)
- const = ARMExpandImm_C(imm12, 0)
+ reg_D = Register(Rd)
+ setflags = (S == '1')
+ imm32 = ARMExpandImm_C(imm12, 0)
- }
+ }
- @rules {
+ @rules {
- //if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions
+ if (setflags); chk_call ExtendKeyword("s")
+ chk_call StoreCondition(cond)
- }
+ }
}
+