1 files changed, 18 insertions, 46 deletions
diff --git a/src/arch/arm/v7/opdefs/strb_A88207.d b/src/arch/arm/v7/opdefs/strb_A88207.d
index 2af8fb7..4e893fb 100644
--- a/src/arch/arm/v7/opdefs/strb_A88207.d
+++ b/src/arch/arm/v7/opdefs/strb_A88207.d
@@ -2,7 +2,7 @@
 /* Chrysalide - Outil d'analyse de fichiers binaires
  * ##FILE## - traduction d'instructions ARMv7
  *
- * Copyright (C) 2014 Cyrille Bagard
+ * Copyright (C) 2015 Cyrille Bagard
  *
  *  This file is part of Chrysalide.
  *
@@ -23,59 +23,31 @@
 
 @title STRB (immediate, ARM)
 
-@encoding(A11) {
+@desc Store Register Byte (immediate) calculates an address from a base register value and an immediate offset, and stores a byte from a register to memory. It can use offset, post-indexed, or pre-indexed addressing. For information about memory accesses see Memory accesses on page A8-294.
 
-    @word cond(4) 0 1 0 1 U(1) 1 W(1) 0 Rn(4) Rt(4) imm12(12)
+@encoding (A1) {
 
-    @syntax <Rgt> <access>
+	@word cond(4) 0 1 0 P(1) U(1) 1 W(1) 0 Rn(4) Rt(4) imm12(12)
 
-    @conv {
+	@syntax <reg_T> <mem_access>
 
-        Rgt = Register(Rt)
-        Rgn = Register(Rn)
-        imm32 = ZeroExtend(imm12, 12, 32);
-        access = MakeMemoryAccess(Rgn, imm32, U, W)
+	@conv {
 
-    }
+		reg_T = Register(Rt)
+		reg_N = Register(Rn)
+		imm32 = ZeroExtend(imm12, 32)
+		index = (P == '1')
+		add = (U == '1')
+		wback = (P == '0') || (W == '1')
+		mem_access = MakeMemoryAccess(reg_N, imm32, NULL, index, add, wback)
 
-    @rules {
+	}
 
-        //if Rt == '1111' && P == '1' && U == '0' && W == '0' then SEE PLD, PLDW (immediate);
-        //if Rn == '1111' then SEE LDRB (literal);
-        //if P == '1' && U == '1' && W == '0' then SEE LDRBT;
-        //if P == '0' && W == '0' then UNDEFINED;
-        //if t == 13 || (t == 15 && W == '1') || (wback && n == t) then UNPREDICTABLE;
-        if (Rt == '1111'); chk_call SetInsFlag(AIF_RETURN_POINT)
+	@rules {
 
-    }
+		chk_call StoreCondition(cond)
 
-}
-
-@encoding(A12) {
-
-    @word cond(4) 0 1 0 0 U(1) 1 W(1) 0 Rn(4) Rt(4) imm12(12)
-
-    @syntax <Rgt> <base> <offset>
-
-    @conv {
-
-        Rgt = Register(Rt)
-        Rgn = Register(Rn)
-        imm32 = ZeroExtend(imm12, 12, 32);
-        base = MakeMemoryNotIndexed(Rgn, W)
-        offset = MakeAccessOffset(U, imm32)
-
-    }
-
-    @rules {
-
-        //if Rt == '1111' && P == '1' && U == '0' && W == '0' then SEE PLD, PLDW (immediate);
-        //if Rn == '1111' then SEE LDRB (literal);
-        //if P == '1' && U == '1' && W == '0' then SEE LDRBT;
-        //if P == '0' && W == '0' then UNDEFINED;
-        //if t == 13 || (t == 15 && W == '1') || (wback && n == t) then UNPREDICTABLE;
-        if (Rt == '1111'); chk_call SetInsFlag(AIF_RETURN_POINT)
-
-    }
+	}
 
 }
+