1 files changed, 30 insertions, 34 deletions
diff --git a/src/arch/arm/v7/opdefs/uxtb_A88274.d b/src/arch/arm/v7/opdefs/uxtb_A88274.d
index 8917144..f49ba83 100644
--- a/src/arch/arm/v7/opdefs/uxtb_A88274.d
+++ b/src/arch/arm/v7/opdefs/uxtb_A88274.d
@@ -2,7 +2,7 @@
 /* Chrysalide - Outil d'analyse de fichiers binaires
  * ##FILE## - traduction d'instructions ARMv7
  *
- * Copyright (C) 2014 Cyrille Bagard
+ * Copyright (C) 2015 Cyrille Bagard
  *
  *  This file is part of Chrysalide.
  *
@@ -23,62 +23,58 @@
 
 @title UXTB
 
-@encoding(t1) {
+@desc Unsigned Extend Byte extracts an 8-bit value from a register, zero-extends it to 32 bits, and writes the result to the destination register. The instruction can specify a rotation by 0, 8, 16, or 24 bits before extracting the 8-bit value.
 
-    @half 1 0 1 1 0 0 1 0 1 1 Rm(3) Rd(3)
+@encoding (t1) {
 
-    @syntax <Rd> <Rm>
+	@half 1 0 1 1 0 0 1 0 1 1 Rm(3) Rd(3)
 
-    @conv {
+	@syntax <reg_D> <reg_M>
 
-        Rd = Register(Rd)
-        Rm = Register(Rm)
+	@conv {
 
-    }
+		reg_D = Register(Rd)
+		reg_M = Register(Rm)
 
-}
-
-@encoding(T2) {
-
-    @word 1 1 1 1 1 0 1 0 0 1 0 1 1 1 1 1 1 1 1 1 Rd(4) 1 0 rotate(2) Rm(4)
+	}
 
-    @syntax "uxtb.W" <Rd> <Rm> <?rotation>
+}
 
-    @conv {
+@encoding (T2) {
 
-        Rd = Register(Rd)
-        Rm = Register(Rm)
-        rotation = BuildRotation(rotate:'000')
+	@word 1 1 1 1 1 0 1 0 0 1 0 1 1 1 1 1 1 1 1 1 Rd(4) 1 0 rotate(2) Rm(4)
 
-    }
+	@syntax ".W" <reg_D> <reg_M> <?rotation>
 
-    @rules {
+	@conv {
 
-        //if d IN {13,15} || m IN {13,15} then UNPREDICTABLE;
+		reg_D = Register(Rd)
+		reg_M = Register(Rm)
+		rotation = Rotation(rotate:'000')
 
-    }
+	}
 
 }
 
-@encoding(A1) {
+@encoding (A1) {
 
-    @word cond(4) 0 1 1 0 1 1 1 0 1 1 1 1 Rd(4) rotate(2) 0 0 0 1 1 1 Rm(4)
+	@word cond(4) 0 1 1 0 1 1 1 0 1 1 1 1 Rd(4) rotate(2) 0 0 0 1 1 1 Rm(4)
 
-    @syntax {c} <Rd> <Rm> <?rotation>
+	@syntax <reg_D> <reg_M> <?rotation>
 
-    @conv {
+	@conv {
 
-        c = Condition(cond)
-        Rd = Register(Rd)
-        Rm = Register(Rm)
-        rotation = BuildRotation(rotate:'000')
+		reg_D = Register(Rd)
+		reg_M = Register(Rm)
+		rotation = Rotation(rotate:'000')
 
-    }
+	}
 
-    @rules {
+	@rules {
 
-        //if d == 15 || m == 15 then UNPREDICTABLE;
+		chk_call StoreCondition(cond)
 
-    }
+	}
 
 }
+