diff options
Diffstat (limited to 'src/arch/arm/v7/opdefs')
-rw-r--r-- | src/arch/arm/v7/opdefs/Makefile.am | 1 | ||||
-rw-r--r-- | src/arch/arm/v7/opdefs/b_A8818.d | 45 | ||||
-rw-r--r-- | src/arch/arm/v7/opdefs/bl_A8825.d | 32 | ||||
-rw-r--r-- | src/arch/arm/v7/opdefs/blx_A8826.d | 2 | ||||
-rw-r--r-- | src/arch/arm/v7/opdefs/bx_A8827.d | 12 | ||||
-rw-r--r-- | src/arch/arm/v7/opdefs/cbnz_A8829.d | 14 | ||||
-rw-r--r-- | src/arch/arm/v7/opdefs/ldr_A8862.d | 3 | ||||
-rw-r--r-- | src/arch/arm/v7/opdefs/ldr_A8863.d | 2 | ||||
-rw-r--r-- | src/arch/arm/v7/opdefs/ldr_A8864.d | 32 | ||||
-rw-r--r-- | src/arch/arm/v7/opdefs/ldr_A8865.d | 1 | ||||
-rw-r--r-- | src/arch/arm/v7/opdefs/ldrb_A8867.d | 3 |
11 files changed, 142 insertions, 5 deletions
diff --git a/src/arch/arm/v7/opdefs/Makefile.am b/src/arch/arm/v7/opdefs/Makefile.am index 0966e2e..fa42230 100644 --- a/src/arch/arm/v7/opdefs/Makefile.am +++ b/src/arch/arm/v7/opdefs/Makefile.am @@ -16,6 +16,7 @@ D2C_ENCODINGS = \ -e T=thumb_32_ D2C_MACROS = \ + -M DefineAsReturn=g_arch_instruction_define_as_return \ -M SetFlags=g_armv7_instruction_define_setflags \ -M Condition=g_arm_instruction_set_cond \ -M Register=translate_armv7_register \ diff --git a/src/arch/arm/v7/opdefs/b_A8818.d b/src/arch/arm/v7/opdefs/b_A8818.d index 50600d4..5d696a3 100644 --- a/src/arch/arm/v7/opdefs/b_A8818.d +++ b/src/arch/arm/v7/opdefs/b_A8818.d @@ -36,10 +36,18 @@ } + @hooks { + + link = handle_links_with_instruction_b_from_thumb + post = post_process_branch_instructions + + } + @rules { //if cond == '1110' then UNDEFINED; //if cond == '1111' then SEE SVC; + call DefineAsReturn(1) } @@ -57,9 +65,17 @@ } + @hooks { + + link = handle_links_with_instruction_b_from_thumb + post = post_process_branch_instructions + + } + @rules { //if InITBlock() && !LastInITBlock() then UNPREDICTABLE; + call DefineAsReturn(1) } @@ -78,10 +94,18 @@ } + @hooks { + + link = handle_links_with_instruction_b_from_thumb + post = post_process_branch_instructions + + } + @rules { //if cond<3:1> == '111' then SEE "Related encodings"; //if InITBlock() then UNPREDICTABLE; + call DefineAsReturn(1) } @@ -101,9 +125,17 @@ } + @hooks { + + link = handle_links_with_instruction_b_from_thumb + post = post_process_branch_instructions + + } + @rules { //if InITBlock() && !LastInITBlock() then UNPREDICTABLE; + call DefineAsReturn(1) } @@ -122,4 +154,17 @@ } + @hooks { + + link = handle_links_with_instruction_b_from_arm + post = post_process_branch_instructions + + } + + @rules { + + call DefineAsReturn(1) + + } + } diff --git a/src/arch/arm/v7/opdefs/bl_A8825.d b/src/arch/arm/v7/opdefs/bl_A8825.d index 96c782f..c5de31e 100644 --- a/src/arch/arm/v7/opdefs/bl_A8825.d +++ b/src/arch/arm/v7/opdefs/bl_A8825.d @@ -40,7 +40,13 @@ @hooks { link = handle_links_with_instruction_bl_from_thumb - post = post_process_branch_instructions + post = post_process_branch_and_link_instructions + + } + + @rules { + + //call DefineAsReturn(1) } @@ -63,7 +69,13 @@ @hooks { link = handle_links_with_instruction_blx_from_thumb - post = post_process_branch_instructions + post = post_process_branch_and_link_instructions + + } + + @rules { + + //call DefineAsReturn(1) } @@ -84,7 +96,13 @@ @hooks { link = handle_links_with_instruction_bl_from_arm - post = post_process_branch_instructions + post = post_process_branch_and_link_instructions + + } + + @rules { + + //call DefineAsReturn(1) } @@ -105,7 +123,13 @@ @hooks { link = handle_links_with_instruction_blx_from_arm - post = post_process_branch_instructions + post = post_process_branch_and_link_instructions + + } + + @rules { + + //call DefineAsReturn(1) } diff --git a/src/arch/arm/v7/opdefs/blx_A8826.d b/src/arch/arm/v7/opdefs/blx_A8826.d index 178515a..12c55ad 100644 --- a/src/arch/arm/v7/opdefs/blx_A8826.d +++ b/src/arch/arm/v7/opdefs/blx_A8826.d @@ -39,6 +39,7 @@ //if m == 15 then UNPREDICTABLE; //if InITBlock() && !LastInITBlock() then UNPREDICTABLE; + //call DefineAsReturn(1) } @@ -60,6 +61,7 @@ @rules { //if m == 15 then UNPREDICTABLE; + //call DefineAsReturn(1) } diff --git a/src/arch/arm/v7/opdefs/bx_A8827.d b/src/arch/arm/v7/opdefs/bx_A8827.d index 45ccfd5..b8ab6f8 100644 --- a/src/arch/arm/v7/opdefs/bx_A8827.d +++ b/src/arch/arm/v7/opdefs/bx_A8827.d @@ -36,6 +36,12 @@ } + @rules { + + call DefineAsReturn(1) + + } + } @encoding(A1) { @@ -51,4 +57,10 @@ } + @rules { + + call DefineAsReturn(1) + + } + } diff --git a/src/arch/arm/v7/opdefs/cbnz_A8829.d b/src/arch/arm/v7/opdefs/cbnz_A8829.d index 9ecf141..93a8d1f 100644 --- a/src/arch/arm/v7/opdefs/cbnz_A8829.d +++ b/src/arch/arm/v7/opdefs/cbnz_A8829.d @@ -36,6 +36,13 @@ } + @hooks { + + link = handle_links_with_instruction_cb_n_z + post = post_process_comp_and_branch_instructions + + } + } @encoding(t12) { @@ -51,4 +58,11 @@ } + @hooks { + + link = handle_links_with_instruction_cb_n_z + post = post_process_comp_and_branch_instructions + + } + } diff --git a/src/arch/arm/v7/opdefs/ldr_A8862.d b/src/arch/arm/v7/opdefs/ldr_A8862.d index 7799fce..ecb530b 100644 --- a/src/arch/arm/v7/opdefs/ldr_A8862.d +++ b/src/arch/arm/v7/opdefs/ldr_A8862.d @@ -76,6 +76,7 @@ //if Rn == '1111' then SEE LDR (literal); //if t == 15 && InITBlock() && !LastInITBlock() then UNPREDICTABLE; + if (Rt == '1111'); call DefineAsReturn(1) } @@ -103,6 +104,7 @@ //if Rn == '1101' && P == '0' && U == '1' && W == '1' && imm8 == '00000100' then SEE POP; //if P == '0' && W == '0' then UNDEFINED; //if (wback && n == t) || (t == 15 && InITBlock() && !LastInITBlock()) then UNPREDICTABLE; + if (Rt == '1111'); call DefineAsReturn(1) } @@ -131,6 +133,7 @@ //if Rn == '1101' && P == '0' && U == '1' && W == '1' && imm8 == '00000100' then SEE POP; //if P == '0' && W == '0' then UNDEFINED; //if (wback && n == t) || (t == 15 && InITBlock() && !LastInITBlock()) then UNPREDICTABLE; + if (Rt == '1111'); call DefineAsReturn(1) } diff --git a/src/arch/arm/v7/opdefs/ldr_A8863.d b/src/arch/arm/v7/opdefs/ldr_A8863.d index 2526671..0158c3d 100644 --- a/src/arch/arm/v7/opdefs/ldr_A8863.d +++ b/src/arch/arm/v7/opdefs/ldr_A8863.d @@ -46,6 +46,7 @@ //t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32); //index = (P == '1'); add = (U == '1'); wback = (P == '0') || (W == '1'); //if wback && n == t then UNPREDICTABLE; + if (Rt == '1111'); call DefineAsReturn(1) } @@ -75,6 +76,7 @@ //t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32); //index = (P == '1'); add = (U == '1'); wback = (P == '0') || (W == '1'); //if wback && n == t then UNPREDICTABLE; + if (Rt == '1111'); call DefineAsReturn(1) } diff --git a/src/arch/arm/v7/opdefs/ldr_A8864.d b/src/arch/arm/v7/opdefs/ldr_A8864.d index acb6f94..3fbc0e3 100644 --- a/src/arch/arm/v7/opdefs/ldr_A8864.d +++ b/src/arch/arm/v7/opdefs/ldr_A8864.d @@ -37,6 +37,13 @@ } + @hooks { + + link = handle_links_with_instruction_ldr_literal_from_thumb + post = post_process_ldr_instructions + + } + } @encoding(T2) { @@ -53,9 +60,17 @@ } + @hooks { + + link = handle_links_with_instruction_ldr_literal_from_thumb + post = post_process_ldr_instructions + + } + @rules { //if t == 15 && InITBlock() && !LastInITBlock() then UNPREDICTABLE; + if (Rt == '1111'); call DefineAsReturn(1) } @@ -65,14 +80,29 @@ @word cond(4) 0 1 0 1 U(1) 0 0 1 1 1 1 1 Rt(4) imm12(12) - @syntax <Rgt> <label> + @syntax {c} <Rgt> <label> @conv { + c = Condition(cond) Rgt = Register(Rt) imm32 = ZeroExtend(imm12, 12, 32) label = MakeAccessOffset(U, imm32) } + @hooks { + + link = handle_links_with_instruction_ldr_literal_from_arm + post = post_process_ldr_instructions + + } + + @rules { + + //if t == 15 && InITBlock() && !LastInITBlock() then UNPREDICTABLE; + if (Rt == '1111'); call DefineAsReturn(1) + + } + } diff --git a/src/arch/arm/v7/opdefs/ldr_A8865.d b/src/arch/arm/v7/opdefs/ldr_A8865.d index 11a8932..56a09fb 100644 --- a/src/arch/arm/v7/opdefs/ldr_A8865.d +++ b/src/arch/arm/v7/opdefs/ldr_A8865.d @@ -67,6 +67,7 @@ //if Rn == '1111' then SEE LDR (literal); //if m IN {13,15} then UNPREDICTABLE; //if t == 15 && InITBlock() && !LastInITBlock() then UNPREDICTABLE; + if (Rt == '1111'); call DefineAsReturn(1) } diff --git a/src/arch/arm/v7/opdefs/ldrb_A8867.d b/src/arch/arm/v7/opdefs/ldrb_A8867.d index 8097fd0..52a50cb 100644 --- a/src/arch/arm/v7/opdefs/ldrb_A8867.d +++ b/src/arch/arm/v7/opdefs/ldrb_A8867.d @@ -60,6 +60,7 @@ //if Rt == '1111' then SEE PLD; //if Rn == '1111' then SEE LDRB (literal); //if t == 13 then UNPREDICTABLE; + if (Rt == '1111'); call DefineAsReturn(1) } @@ -87,6 +88,7 @@ //if P == '1' && U == '1' && W == '0' then SEE LDRBT; //if P == '0' && W == '0' then UNDEFINED; //if t == 13 || (t == 15 && W == '1') || (wback && n == t) then UNPREDICTABLE; + if (Rt == '1111'); call DefineAsReturn(1) } @@ -115,6 +117,7 @@ //if P == '1' && U == '1' && W == '0' then SEE LDRBT; //if P == '0' && W == '0' then UNDEFINED; //if t == 13 || (t == 15 && W == '1') || (wback && n == t) then UNPREDICTABLE; + if (Rt == '1111'); call DefineAsReturn(1) } |