3 files changed, 29 insertions, 16 deletions

diff --git a/src/arch/arm/v7/fetch.c b/src/arch/arm/v7/fetch.c
index 73cec6d..da83d15 100644
--- a/src/arch/arm/v7/fetch.c
+++ b/src/arch/arm/v7/fetch.c
@@ -353,7 +353,7 @@ void help_fetching_with_instruction_cb_n_z(GArchInstruction *instr, GArchProcess
 *                proc    = représentation de l'architecture utilisée.         *
 *                context = contexte associé à la phase de désassemblage.      *
 *                format  = acès aux données du binaire d'origine.             *
-*                iset    = type de jeu d'instructions courant à inverser.     *
+*                iset    = type de jeu d'instructions courant.                *
 *                                                                             *
 *  Description : Complète un désassemblage accompli pour une instruction.     *
 *                                                                             *
@@ -429,7 +429,13 @@ void help_fetching_with_instruction_ldr_literal_with_orig(GArchInstruction *inst
     else
         val_offset = phys_pc - offset;
 
-    init_vmpa(&sym_addr, val_offset, VMPA_NO_VIRTUAL);
+    if (!g_exe_format_translate_offset_into_vmpa(G_EXE_FORMAT(format), val_offset, &sym_addr))
+    {
+        assert(0);
+        return;
+    }
+
+    //init_vmpa(&sym_addr, val_offset, VMPA_NO_VIRTUAL);
     init_mrange(&sym_range, &sym_addr, 4);
 
 
@@ -502,6 +508,7 @@ void help_fetching_with_instruction_ldr_literal_with_orig(GArchInstruction *inst
     /// FIXME ?!
     if (target < 0x8000) return;
 
+    if (target > 0x6966c) return;
 
 
     new = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, target);
@@ -517,7 +524,7 @@ void help_fetching_with_instruction_ldr_literal_with_orig(GArchInstruction *inst
     //target = pc + offset;
 
     //g_armv7_context_define_encoding(context, target, AV7IS_THUMB);
-    g_armv7_context_push_drop_point_ext(context, target, AV7IS_THUMB);
+    g_armv7_context_push_drop_point_ext(context, target, iset);
 
 
     //exit(0);
diff --git a/src/arch/arm/v7/opdefs/bl_A8825.d b/src/arch/arm/v7/opdefs/bl_A8825.d
index a9b395a..c2eb7bd 100644
--- a/src/arch/arm/v7/opdefs/bl_A8825.d
+++ b/src/arch/arm/v7/opdefs/bl_A8825.d
@@ -113,7 +113,7 @@
 
 @encoding(A2) {
 
-    @word cond(4) 1 0 1 H(1) imm24(24)
+    @word 1 1 1 1 1 0 1 H(1) imm24(24)
 
     @syntax "blx" <imm32>
 
diff --git a/src/arch/arm/v7/post.c b/src/arch/arm/v7/post.c
index e95bd66..e066bb0 100644
--- a/src/arch/arm/v7/post.c
+++ b/src/arch/arm/v7/post.c
@@ -24,9 +24,6 @@
 #include "post.h"
 
 
-#include <assert.h>
-
-
 #include "../../target.h"
 
 
@@ -60,13 +57,13 @@ void post_process_branch_instructions(GArchInstruction *instr, GArchProcessor *p
 
     op = g_arch_instruction_get_operand(instr, 0);
 
-    if (g_imm_operand_get_value(G_IMM_OPERAND(op), MDS_32_BITS_UNSIGNED, &addr))
+    if (g_imm_operand_get_value(G_IMM_OPERAND(op), MDS_32_BITS_UNSIGNED, &addr)
+        && g_exe_format_translate_address_into_vmpa(G_EXE_FORMAT(format), addr, &target))
     {
         new = g_target_operand_new(MDS_32_BITS_UNSIGNED, addr);
 
         if (!g_target_operand_resolve(G_TARGET_OPERAND(new), format))
         {
-            init_vmpa(&target, VMPA_NO_PHYSICAL, addr);
             init_mrange(&trange, &target, 0);
 
             vmpa2_virt_to_string(&target, MDS_UNDEFINED, loc, NULL);
@@ -124,13 +121,23 @@ void post_process_branch_and_link_instructions(GArchInstruction *instr, GArchPro
 
     op = g_arch_instruction_get_operand(instr, 0);
 
-    if (g_imm_operand_get_value(G_IMM_OPERAND(op), MDS_32_BITS_UNSIGNED, &addr))
+    if (g_imm_operand_get_value(G_IMM_OPERAND(op), MDS_32_BITS_UNSIGNED, &addr)
+        && g_exe_format_translate_address_into_vmpa(G_EXE_FORMAT(format), addr, &target))
     {
+
+
+        /// FIXME (DUR) ?!
+        if (addr < 0x8000) return;
+
+        if (addr > 0x6966c) return;
+
+
+
+
         new = g_target_operand_new(MDS_32_BITS_UNSIGNED, addr);
 
         if (!g_target_operand_resolve(G_TARGET_OPERAND(new), format))
         {
-            init_vmpa(&target, VMPA_NO_PHYSICAL, addr);
             init_mrange(&trange, &target, 0);
 
             vmpa2_virt_to_string(&target, MDS_UNDEFINED, loc, NULL);
@@ -188,13 +195,13 @@ void post_process_comp_and_branch_instructions(GArchInstruction *instr, GArchPro
 
     op = g_arch_instruction_get_operand(instr, 1);
 
-    if (g_imm_operand_get_value(G_IMM_OPERAND(op), MDS_32_BITS_UNSIGNED, &addr))
+    if (g_imm_operand_get_value(G_IMM_OPERAND(op), MDS_32_BITS_UNSIGNED, &addr)
+        && g_exe_format_translate_address_into_vmpa(G_EXE_FORMAT(format), addr, &target))
     {
         new = g_target_operand_new(MDS_32_BITS_UNSIGNED, addr);
 
         if (!g_target_operand_resolve(G_TARGET_OPERAND(new), format))
         {
-            init_vmpa(&target, VMPA_NO_PHYSICAL, addr);
             init_mrange(&trange, &target, 0);
 
             vmpa2_virt_to_string(&target, MDS_UNDEFINED, loc, NULL);
@@ -256,7 +263,8 @@ void post_process_ldr_instructions(GArchInstruction *instr, GArchProcessor *proc
     if (!G_IS_IMM_OPERAND(op)) return;
 
 
-    if (g_imm_operand_get_value(G_IMM_OPERAND(op), MDS_32_BITS_UNSIGNED, &addr))
+    if (g_imm_operand_get_value(G_IMM_OPERAND(op), MDS_32_BITS_UNSIGNED, &addr)
+        && g_exe_format_translate_address_into_vmpa(G_EXE_FORMAT(format), addr, &target))
     {
         new = g_target_operand_new(MDS_32_BITS_UNSIGNED, addr);
 
@@ -277,7 +285,6 @@ void post_process_ldr_instructions(GArchInstruction *instr, GArchProcessor *proc
 
             } while (0);
 
-            init_vmpa(&target, VMPA_NO_PHYSICAL, addr);
             init_mrange(&trange, &target, 0);
 
             vmpa2_virt_to_string(&target, MDS_UNDEFINED, loc, NULL);
@@ -317,6 +324,5 @@ void post_process_ldr_instructions(GArchInstruction *instr, GArchProcessor *proc
         g_arch_instruction_replace_operand(instr, new, op);
 
     }
-    else assert(0);
 
 }