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-rw-r--r--src/arch/arm/v7/Makefile.am1
-rw-r--r--src/arch/arm/v7/helpers.c2
-rw-r--r--src/arch/arm/v7/opdefs/bl_A8825.d12
-rw-r--r--src/arch/arm/v7/post.c216
-rw-r--r--src/arch/arm/v7/post.h41
-rw-r--r--src/arch/arm/v7/processor.c28
6 files changed, 292 insertions, 8 deletions
diff --git a/src/arch/arm/v7/Makefile.am b/src/arch/arm/v7/Makefile.am
index 0bb88aa..704b3a6 100644
--- a/src/arch/arm/v7/Makefile.am
+++ b/src/arch/arm/v7/Makefile.am
@@ -5,6 +5,7 @@ libarcharmv7_la_SOURCES = \
arm.h arm.c \
helpers.h helpers.c \
instruction.h instruction.c \
+ post.h post.c \
processor.h processor.c \
pseudo.h pseudo.c \
register.h register.c \
diff --git a/src/arch/arm/v7/helpers.c b/src/arch/arm/v7/helpers.c
index 8acfeb5..45c6ba5 100644
--- a/src/arch/arm/v7/helpers.c
+++ b/src/arch/arm/v7/helpers.c
@@ -145,7 +145,7 @@ GArchOperand *sign_extend_armv7_imm(uint32_t value, bool topbit, unsigned int si
mds = MDS_ ## sz ## _BITS_SIGNED; \
val ## sz = value; \
if (topbit) \
- for (i = msb + 1; i < sz; i++) \
+ for (i = msb; i < sz; i++) \
val ## sz |= (1 << i); \
result = g_imm_operand_new_from_value(mds, val ## sz); \
break;
diff --git a/src/arch/arm/v7/opdefs/bl_A8825.d b/src/arch/arm/v7/opdefs/bl_A8825.d
index c9ef5d0..dc9c922 100644
--- a/src/arch/arm/v7/opdefs/bl_A8825.d
+++ b/src/arch/arm/v7/opdefs/bl_A8825.d
@@ -25,7 +25,7 @@
@encoding(T1) {
- @word 1 1 1 1 0 S(1) imm10H(10) 1 1 J1(1) 1 J2(1) imm10L(10) H(1)
+ @word 1 1 1 1 0 S(1) imm10(10) 1 1 J1(1) 1 J2(1) imm11(11)
@syntax <imm32>
@@ -33,7 +33,7 @@
I1 = NOT(J1 EOR S)
I2 = NOT(J2 EOR S)
- imm32 = SignExtend(S:I1:I2:imm10H:imm10L:'00', s, 32)
+ imm32 = SignExtend(S:I1:I2:imm10:imm11:'0', S, 32)
}
@@ -41,15 +41,15 @@
@encoding(T2) {
- @word 1 1 1 1 0 S(1) imm10(10) 1 1 J1(1) 0 J2(1) imm11(11)
+ @word 1 1 1 1 0 S(1) imm10H(10) 1 1 J1(1) 0 J2(1) imm10L(10) H(1)
- @syntax <imm32>
+ @syntax "blx" <imm32>
@conv {
I1 = NOT(J1 EOR S)
I2 = NOT(J2 EOR S)
- imm32 = SignExtend(S:I1:I2:imm10:imm11:'0', S, 32)
+ imm32 = SignExtend(S:I1:I2:imm10H:imm10L:'00', S, 32)
}
@@ -73,7 +73,7 @@
@word cond(4) 1 0 1 H(1) imm24(24)
- @syntax <imm32>
+ @syntax "blx" <imm32>
@conv {
diff --git a/src/arch/arm/v7/post.c b/src/arch/arm/v7/post.c
new file mode 100644
index 0000000..8ba12d8
--- /dev/null
+++ b/src/arch/arm/v7/post.c
@@ -0,0 +1,216 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * post.c - traitements complémentaires à la phase de désassemblage
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * OpenIDA is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * OpenIDA is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#include "post.h"
+
+
+
+
+
+#include "../../target.h"
+
+
+
+
+
+/******************************************************************************
+* *
+* Paramètres : instr = instruction ARMv7 à traiter. *
+* format = acès aux données du binaire d'origine. *
+* *
+* Description : Complète un désassemblage accompli pour une instruction. *
+* *
+* Retour : - *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+void post_process_thumb_instruction_bl(GArchInstruction *instr, GBinFormat *format)
+{
+
+
+ const mrange_t *range;
+
+ virt_t pc;
+
+
+
+
+
+ GArchOperand *op;
+ vmpa_t val;
+ GArchOperand *new;
+
+ vmpa2t target;
+ mrange_t trange;
+ VMPA_BUFFER(loc);
+ char name[5 + VMPA_MAX_LEN];
+ GBinRoutine *routine; /* Nouvelle routine trouvée */
+ GBinSymbol *symbol; /* Nouveau symbole construit */
+
+
+
+
+ range = g_arch_instruction_get_range(instr);
+
+ pc = get_virt_addr(get_mrange_addr(range)) + 4 /* PC++ */;
+ printf(" -- PC = 0x%x\n", (unsigned int)pc);
+
+
+ op = g_arch_instruction_get_operand(instr, 0);
+
+ g_imm_operand_to_vmpa_t(G_IMM_OPERAND(op), &val);
+
+ printf(" -> %llx = %lld ==>> 0x%x\n", val, val, (unsigned int)(pc + val));
+
+
+
+ new = g_target_operand_new(MDS_32_BITS, pc + val);
+
+ if (!g_target_operand_resolve(G_TARGET_OPERAND(new), format))
+ {
+ init_vmpa(&target, VMPA_NO_PHYSICAL, pc + val);
+ init_mrange(&trange, &target, 0);
+
+ vmpa2_virt_to_string(&target, MDS_32_BITS, loc, NULL);
+ snprintf(name, sizeof(name), "loc_%s", loc + 2);
+
+ routine = g_binary_routine_new();
+ g_binary_routine_set_name(routine, strdup(name));
+ //routine = try_to_demangle_routine(name);
+
+ g_binary_routine_set_range(routine, &trange);
+
+ symbol = g_binary_symbol_new(STP_ROUTINE, NULL, ~0);
+ g_binary_symbol_attach_routine(symbol, routine);
+ g_binary_format_add_symbol(G_BIN_FORMAT(format), symbol);
+
+
+
+ g_target_operand_resolve(G_TARGET_OPERAND(new), format);
+
+
+ }
+
+
+ g_arch_instruction_replace_operand(instr, new, op);
+ //g_arch_instruction_attach_extra_operand(result, new);
+
+
+
+}
+
+
+
+
+
+/******************************************************************************
+* *
+* Paramètres : instr = instruction ARMv7 à traiter. *
+* format = acès aux données du binaire d'origine. *
+* *
+* Description : Complète un désassemblage accompli pour une instruction. *
+* *
+* Retour : - *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+void post_process_thumb_instruction_blx(GArchInstruction *instr, GBinFormat *format)
+{
+
+
+
+
+
+ const mrange_t *range;
+
+ virt_t pc;
+
+
+
+ GArchOperand *op;
+ vmpa_t val;
+ GArchOperand *new;
+
+ vmpa2t target;
+ mrange_t trange;
+ VMPA_BUFFER(loc);
+ char name[5 + VMPA_MAX_LEN];
+ GBinRoutine *routine; /* Nouvelle routine trouvée */
+ GBinSymbol *symbol; /* Nouveau symbole construit */
+
+
+
+ range = g_arch_instruction_get_range(instr);
+
+ pc = get_virt_addr(get_mrange_addr(range)) + 4 /* PC++ */;
+
+ printf(" -- PC = 0x%x -> 0x%x\n", (unsigned int)pc, (unsigned int)pc - pc % 4);
+ pc = pc - pc % 4;
+
+ op = g_arch_instruction_get_operand(instr, 0);
+
+ g_imm_operand_to_vmpa_t(G_IMM_OPERAND(op), &val);
+
+ printf(" -> %llx = %lld ==>> 0x%x\n", val, val, (unsigned int)(pc + val));
+
+
+
+ new = g_target_operand_new(MDS_32_BITS, pc + val);
+
+ if (!g_target_operand_resolve(G_TARGET_OPERAND(new), format))
+ {
+ init_vmpa(&target, VMPA_NO_PHYSICAL, pc + val);
+ init_mrange(&trange, &target, 0);
+
+ vmpa2_virt_to_string(&target, MDS_32_BITS, loc, NULL);
+ snprintf(name, sizeof(name), "loc_%s", loc + 2);
+
+ routine = g_binary_routine_new();
+ g_binary_routine_set_name(routine, strdup(name));
+ //routine = try_to_demangle_routine(name);
+
+ g_binary_routine_set_range(routine, &trange);
+
+ symbol = g_binary_symbol_new(STP_ROUTINE, NULL, ~0);
+ g_binary_symbol_attach_routine(symbol, routine);
+ g_binary_format_add_symbol(G_BIN_FORMAT(format), symbol);
+
+
+
+ g_target_operand_resolve(G_TARGET_OPERAND(new), format);
+
+
+ }
+
+ g_arch_instruction_replace_operand(instr, new, op);
+ //g_arch_instruction_attach_extra_operand(result, new);
+
+
+
+
+}
+
diff --git a/src/arch/arm/v7/post.h b/src/arch/arm/v7/post.h
new file mode 100644
index 0000000..d9ad99e
--- /dev/null
+++ b/src/arch/arm/v7/post.h
@@ -0,0 +1,41 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * post.h - prototypes pour les traitements complémentaires à la phase de désassemblage
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * OpenIDA is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * OpenIDA is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#ifndef _ARCH_ARM_V7_POST_H
+#define _ARCH_ARM_V7_POST_H
+
+
+#include "../../instruction.h"
+#include "../../../format/format.h"
+
+
+
+/* Complète un désassemblage accompli pour une instruction. */
+void post_process_thumb_instruction_bl(GArchInstruction *, GBinFormat *);
+
+/* Complète un désassemblage accompli pour une instruction. */
+void post_process_thumb_instruction_blx(GArchInstruction *, GBinFormat *);
+
+
+
+#endif /* _ARCH_ARM_V7_POST_H */
diff --git a/src/arch/arm/v7/processor.c b/src/arch/arm/v7/processor.c
index dac9639..2b8617b 100644
--- a/src/arch/arm/v7/processor.c
+++ b/src/arch/arm/v7/processor.c
@@ -200,7 +200,7 @@ GArmV7Processor *g_armv7_processor_new(void)
* Remarques : - *
* *
******************************************************************************/
-
+#include "post.h"
static GArchInstruction *g_armv7_processor_disassemble(const GArmV7Processor *proc, GArmContext *ctx, const bin_t *data, vmpa2t *pos, phys_t end)
{
GArchInstruction *result; /* Instruction à renvoyer */
@@ -209,6 +209,9 @@ static GArchInstruction *g_armv7_processor_disassemble(const GArmV7Processor *pr
uint16_t raw16; /* Donnée 16 bits à analyser */
uint32_t raw32; /* Donnée 32 bits à analyser */
+
+
+
start = get_phy_addr(pos);
diff = 4;
@@ -258,6 +261,29 @@ static GArchInstruction *g_armv7_processor_disassemble(const GArmV7Processor *pr
result = g_raw_instruction_new_array(data, MDS_32_BITS, 1, pos, end,
G_ARCH_PROCESSOR(proc)->endianness);
+
+
+
+
+ if (strcmp(g_arch_instruction_get_keyword(result, 0), "bl") == 0/* && pc == 0x000085b2*/)
+ {
+
+
+ g_arch_instruction_set_post_prod_function(result, post_process_thumb_instruction_bl);
+
+
+
+ }
+
+ if (strcmp(g_arch_instruction_get_keyword(result, 0), "blx") == 0/* && pc == 0x000085b2*/)
+ {
+
+ g_arch_instruction_set_post_prod_function(result, post_process_thumb_instruction_blx);
+
+
+ }
+
+
return result;
}
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