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-rw-r--r--src/arch/arm/v7/Makefile.am2
-rw-r--r--src/arch/arm/v7/fetch.c (renamed from src/arch/arm/v7/link.c)22
-rw-r--r--src/arch/arm/v7/fetch.h113
-rw-r--r--src/arch/arm/v7/link.h113
-rw-r--r--src/arch/arm/v7/opdefs/Makefile.am2
-rw-r--r--src/arch/arm/v7/opdefs/b_A8818.d25
-rw-r--r--src/arch/arm/v7/opdefs/bl_A8825.d8
-rw-r--r--src/arch/arm/v7/opdefs/bx_A8827.d4
-rw-r--r--src/arch/arm/v7/opdefs/cbnz_A8829.d4
-rw-r--r--src/arch/arm/v7/opdefs/ldr_A8864.d6
-rw-r--r--src/arch/arm/v7/opdefs/pop_A88131.d3
-rw-r--r--src/arch/arm/v7/opdefs/pop_A88132.d2
-rw-r--r--src/arch/arm/v7/post.c12
-rw-r--r--src/arch/arm/v7/post.h8
14 files changed, 172 insertions, 152 deletions
diff --git a/src/arch/arm/v7/Makefile.am b/src/arch/arm/v7/Makefile.am
index 22e93d4..f9b35b6 100644
--- a/src/arch/arm/v7/Makefile.am
+++ b/src/arch/arm/v7/Makefile.am
@@ -4,9 +4,9 @@ noinst_LTLIBRARIES = libarcharmv7.la
libarcharmv7_la_SOURCES = \
arm.h arm.c \
context.h context.c \
+ fetch.h fetch.c \
helpers.h helpers.c \
instruction.h instruction.c \
- link.h link.c \
post.h post.c \
processor.h processor.c \
pseudo.h pseudo.c \
diff --git a/src/arch/arm/v7/link.c b/src/arch/arm/v7/fetch.c
index 308d4e5..18d61f0 100644
--- a/src/arch/arm/v7/link.c
+++ b/src/arch/arm/v7/fetch.c
@@ -1,6 +1,6 @@
/* Chrysalide - Outil d'analyse de fichiers binaires
- * post.c - traitements complémentaires à la phase de désassemblage
+ * fetch.c - traitements complémentaires à la phase de désassemblage
*
* Copyright (C) 2014 Cyrille Bagard
*
@@ -21,7 +21,7 @@
*/
-#include "link.h"
+#include "fetch.h"
#include <assert.h>
@@ -40,6 +40,7 @@
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = acès aux données du binaire d'origine. *
* iset = type de jeu d'instructions courant à faire suivre. *
@@ -52,7 +53,7 @@
* *
******************************************************************************/
-void handle_links_with_instruction_b_with_orig(GArchInstruction *instr, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
+void help_fetching_with_instruction_b_with_orig(GArchInstruction *instr, GArchProcessor *proc, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
{
const mrange_t *range; /* Emplacementt d'instruction */
virt_t pc; /* Position dans l'exécution */
@@ -106,6 +107,7 @@ void handle_links_with_instruction_b_with_orig(GArchInstruction *instr, GArmV7Co
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = acès aux données du binaire d'origine. *
* iset = type de jeu d'instructions courant à faire suivre. *
@@ -118,7 +120,7 @@ void handle_links_with_instruction_b_with_orig(GArchInstruction *instr, GArmV7Co
* *
******************************************************************************/
-void handle_links_with_instruction_bl_with_orig(GArchInstruction *instr, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
+void help_fetching_with_instruction_bl_with_orig(GArchInstruction *instr, GArchProcessor *proc, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
{
const mrange_t *range; /* Emplacementt d'instruction */
virt_t pc; /* Position dans l'exécution */
@@ -163,6 +165,7 @@ void handle_links_with_instruction_bl_with_orig(GArchInstruction *instr, GArmV7C
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = acès aux données du binaire d'origine. *
* iset = type de jeu d'instructions courant à inverser. *
@@ -175,7 +178,7 @@ void handle_links_with_instruction_bl_with_orig(GArchInstruction *instr, GArmV7C
* *
******************************************************************************/
-void handle_links_with_instruction_blx_with_dest(GArchInstruction *instr, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
+void help_fetching_with_instruction_blx_with_dest(GArchInstruction *instr, GArchProcessor *proc, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
{
const mrange_t *range; /* Emplacementt d'instruction */
virt_t pc; /* Position dans l'exécution */
@@ -221,6 +224,7 @@ void handle_links_with_instruction_blx_with_dest(GArchInstruction *instr, GArmV7
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = acès aux données du binaire d'origine. *
* iset = type de jeu d'instructions courant à faire suivre. *
@@ -233,7 +237,7 @@ void handle_links_with_instruction_blx_with_dest(GArchInstruction *instr, GArmV7
* *
******************************************************************************/
-void handle_links_with_instruction_bx_with_orig(GArchInstruction *instr, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
+void help_fetching_with_instruction_bx_with_orig(GArchInstruction *instr, GArchProcessor *proc, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
{
GArchOperand *op; /* Opérande numérique en place */
GArmRegister *reg; /* Registre matériel manipulé */
@@ -283,6 +287,7 @@ void handle_links_with_instruction_bx_with_orig(GArchInstruction *instr, GArmV7C
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = acès aux données du binaire d'origine. *
* *
@@ -294,7 +299,7 @@ void handle_links_with_instruction_bx_with_orig(GArchInstruction *instr, GArmV7C
* *
******************************************************************************/
-void handle_links_with_instruction_cb_n_z(GArchInstruction *instr, GArmV7Context *context, GBinFormat *format)
+void help_fetching_with_instruction_cb_n_z(GArchInstruction *instr, GArchProcessor *proc, GArmV7Context *context, GBinFormat *format)
{
const mrange_t *range; /* Emplacementt d'instruction */
virt_t pc; /* Position dans l'exécution */
@@ -334,6 +339,7 @@ void handle_links_with_instruction_cb_n_z(GArchInstruction *instr, GArmV7Context
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = acès aux données du binaire d'origine. *
* iset = type de jeu d'instructions courant à inverser. *
@@ -346,7 +352,7 @@ void handle_links_with_instruction_cb_n_z(GArchInstruction *instr, GArmV7Context
* *
******************************************************************************/
-void handle_links_with_instruction_ldr_literal_with_orig(GArchInstruction *instr, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
+void help_fetching_with_instruction_ldr_literal_with_orig(GArchInstruction *instr, GArchProcessor *proc, GArmV7Context *context, GBinFormat *format, ArmV7InstrSet iset)
{
const mrange_t *range; /* Emplacementt d'instruction */
phys_t phys_pc; /* Position dans l'exécution */
diff --git a/src/arch/arm/v7/fetch.h b/src/arch/arm/v7/fetch.h
new file mode 100644
index 0000000..af42f2e
--- /dev/null
+++ b/src/arch/arm/v7/fetch.h
@@ -0,0 +1,113 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * fetch.h - prototypes pour l'édition des liens durant la phase de désassemblage
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * OpenIDA is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * OpenIDA is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#ifndef _ARCH_ARM_V7_FETCH_H
+#define _ARCH_ARM_V7_FETCH_H
+
+
+#include "context.h"
+#include "../../instruction.h"
+#include "../../../format/format.h"
+
+
+
+/* Complète un désassemblage accompli pour une instruction. */
+void help_fetching_with_instruction_b_with_orig(GArchInstruction *, GArchProcessor *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
+
+
+static inline void help_fetching_with_instruction_b_from_arm(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_b_with_orig(ins, proc, ctx, fmt, AV7IS_ARM);
+}
+
+static inline void help_fetching_with_instruction_b_from_thumb(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_b_with_orig(ins, proc, ctx, fmt, AV7IS_THUMB);
+}
+
+
+/* Complète un désassemblage accompli pour une instruction. */
+void help_fetching_with_instruction_bl_with_orig(GArchInstruction *, GArchProcessor *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
+
+
+static inline void help_fetching_with_instruction_bl_from_arm(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_bl_with_orig(ins, proc, ctx, fmt, AV7IS_ARM);
+}
+
+static inline void help_fetching_with_instruction_bl_from_thumb(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_bl_with_orig(ins, proc, ctx, fmt, AV7IS_THUMB);
+}
+
+
+/* Complète un désassemblage accompli pour une instruction. */
+void help_fetching_with_instruction_blx_with_dest(GArchInstruction *, GArchProcessor *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
+
+
+static inline void help_fetching_with_instruction_blx_from_arm(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_blx_with_dest(ins, proc, ctx, fmt, AV7IS_THUMB);
+}
+
+static inline void help_fetching_with_instruction_blx_from_thumb(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_blx_with_dest(ins, proc, ctx, fmt, AV7IS_ARM);
+}
+
+
+/* Complète un désassemblage accompli pour une instruction. */
+void help_fetching_with_instruction_bx_with_orig(GArchInstruction *, GArchProcessor *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
+
+
+static inline void help_fetching_with_instruction_bx_from_arm(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_bx_with_orig(ins, proc, ctx, fmt, AV7IS_ARM);
+}
+
+static inline void help_fetching_with_instruction_bx_from_thumb(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_bx_with_orig(ins, proc, ctx, fmt, AV7IS_THUMB);
+}
+
+
+/* Complète un désassemblage accompli pour une instruction. */
+void help_fetching_with_instruction_cb_n_z(GArchInstruction *, GArchProcessor *, GArmV7Context *, GBinFormat *);
+
+/* Complète un désassemblage accompli pour une instruction. */
+void help_fetching_with_instruction_ldr_literal_with_orig(GArchInstruction *, GArchProcessor *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
+
+
+static inline void help_fetching_with_instruction_ldr_literal_from_arm(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_ldr_literal_with_orig(ins, proc, ctx, fmt, AV7IS_ARM);
+}
+
+static inline void help_fetching_with_instruction_ldr_literal_from_thumb(GArchInstruction *ins, GArchProcessor *proc, GArmV7Context *ctx, GBinFormat *fmt)
+{
+ help_fetching_with_instruction_ldr_literal_with_orig(ins, proc, ctx, fmt, AV7IS_THUMB);
+}
+
+
+
+#endif /* _ARCH_ARM_V7_FETCH_H */
diff --git a/src/arch/arm/v7/link.h b/src/arch/arm/v7/link.h
deleted file mode 100644
index 9e52fe6..0000000
--- a/src/arch/arm/v7/link.h
+++ /dev/null
@@ -1,113 +0,0 @@
-
-/* Chrysalide - Outil d'analyse de fichiers binaires
- * link.h - prototypes pour l'édition des liens durant la phase de désassemblage
- *
- * Copyright (C) 2014 Cyrille Bagard
- *
- * This file is part of Chrysalide.
- *
- * OpenIDA is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3 of the License, or
- * (at your option) any later version.
- *
- * OpenIDA is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
- */
-
-
-#ifndef _ARCH_ARM_V7_LINK_H
-#define _ARCH_ARM_V7_LINK_H
-
-
-#include "context.h"
-#include "../../instruction.h"
-#include "../../../format/format.h"
-
-
-
-/* Complète un désassemblage accompli pour une instruction. */
-void handle_links_with_instruction_b_with_orig(GArchInstruction *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
-
-
-static inline void handle_links_with_instruction_b_from_arm(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_b_with_orig(ins, ctx, fmt, AV7IS_ARM);
-}
-
-static inline void handle_links_with_instruction_b_from_thumb(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_b_with_orig(ins, ctx, fmt, AV7IS_THUMB);
-}
-
-
-/* Complète un désassemblage accompli pour une instruction. */
-void handle_links_with_instruction_bl_with_orig(GArchInstruction *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
-
-
-static inline void handle_links_with_instruction_bl_from_arm(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_bl_with_orig(ins, ctx, fmt, AV7IS_ARM);
-}
-
-static inline void handle_links_with_instruction_bl_from_thumb(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_bl_with_orig(ins, ctx, fmt, AV7IS_THUMB);
-}
-
-
-/* Complète un désassemblage accompli pour une instruction. */
-void handle_links_with_instruction_blx_with_dest(GArchInstruction *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
-
-
-static inline void handle_links_with_instruction_blx_from_arm(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_blx_with_dest(ins, ctx, fmt, AV7IS_THUMB);
-}
-
-static inline void handle_links_with_instruction_blx_from_thumb(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_blx_with_dest(ins, ctx, fmt, AV7IS_ARM);
-}
-
-
-/* Complète un désassemblage accompli pour une instruction. */
-void handle_links_with_instruction_bx_with_orig(GArchInstruction *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
-
-
-static inline void handle_links_with_instruction_bx_from_arm(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_bx_with_orig(ins, ctx, fmt, AV7IS_ARM);
-}
-
-static inline void handle_links_with_instruction_bx_from_thumb(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_bx_with_orig(ins, ctx, fmt, AV7IS_THUMB);
-}
-
-
-/* Complète un désassemblage accompli pour une instruction. */
-void handle_links_with_instruction_cb_n_z(GArchInstruction *, GArmV7Context *, GBinFormat *);
-
-/* Complète un désassemblage accompli pour une instruction. */
-void handle_links_with_instruction_ldr_literal_with_orig(GArchInstruction *, GArmV7Context *, GBinFormat *, ArmV7InstrSet);
-
-
-static inline void handle_links_with_instruction_ldr_literal_from_arm(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_ldr_literal_with_orig(ins, ctx, fmt, AV7IS_ARM);
-}
-
-static inline void handle_links_with_instruction_ldr_literal_from_thumb(GArchInstruction *ins, GArmV7Context *ctx, GBinFormat *fmt)
-{
- handle_links_with_instruction_ldr_literal_with_orig(ins, ctx, fmt, AV7IS_THUMB);
-}
-
-
-
-#endif /* _ARCH_ARM_V7_LINK_H */
diff --git a/src/arch/arm/v7/opdefs/Makefile.am b/src/arch/arm/v7/opdefs/Makefile.am
index 318e20b..b95b588 100644
--- a/src/arch/arm/v7/opdefs/Makefile.am
+++ b/src/arch/arm/v7/opdefs/Makefile.am
@@ -106,7 +106,7 @@ fmk.done: $(ARMV7_DEFS)
fix_includes_in_c_templates:
@for f in `find .gen/ -name '*tmpl.c'`; do \
if grep -q '##INCLUDES##' $$f; then \
- $(fix_verbose)sed -i 's/##INCLUDES##/\n#include "..\/helpers.h"\n#include "..\/instruction.h"\n#include "..\/link.h"\n#include "..\/post.h"\n#include "..\/..\/instruction.h"\n#include "..\/..\/..\/..\/common\/bconst.h"\n\n/' $$f; \
+ $(fix_verbose)sed -i 's/##INCLUDES##/\n#include "..\/helpers.h"\n#include "..\/instruction.h"\n#include "..\/fetch.h"\n#include "..\/post.h"\n#include "..\/..\/instruction.h"\n#include "..\/..\/..\/link.h"\n#include "..\/..\/..\/..\/common\/bconst.h"\n\n/' $$f; \
fi; \
done
diff --git a/src/arch/arm/v7/opdefs/b_A8818.d b/src/arch/arm/v7/opdefs/b_A8818.d
index 50bdda9..a275177 100644
--- a/src/arch/arm/v7/opdefs/b_A8818.d
+++ b/src/arch/arm/v7/opdefs/b_A8818.d
@@ -38,7 +38,8 @@
@hooks {
- link = handle_links_with_instruction_b_from_thumb
+ fetch = help_fetching_with_instruction_b_from_thumb
+ link = handle_branch_if_true_as_link
post = post_process_branch_instructions
}
@@ -47,7 +48,7 @@
//if cond == '1110' then UNDEFINED;
//if cond == '1111' then SEE SVC;
- chk_call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
@@ -67,7 +68,8 @@
@hooks {
- link = handle_links_with_instruction_b_from_thumb
+ fetch = help_fetching_with_instruction_b_from_thumb
+ link = handle_branch_if_true_as_link
post = post_process_branch_instructions
}
@@ -75,7 +77,7 @@
@rules {
//if InITBlock() && !LastInITBlock() then UNPREDICTABLE;
- chk_call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
@@ -96,7 +98,8 @@
@hooks {
- link = handle_links_with_instruction_b_from_thumb
+ fetch = help_fetching_with_instruction_b_from_thumb
+ link = handle_branch_if_true_as_link
post = post_process_branch_instructions
}
@@ -105,7 +108,7 @@
//if cond<3:1> == '111' then SEE "Related encodings";
//if InITBlock() then UNPREDICTABLE;
- chk_call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
@@ -127,7 +130,8 @@
@hooks {
- link = handle_links_with_instruction_b_from_thumb
+ fetch = help_fetching_with_instruction_b_from_thumb
+ link = handle_branch_if_true_as_link
post = post_process_branch_instructions
}
@@ -135,7 +139,7 @@
@rules {
//if InITBlock() && !LastInITBlock() then UNPREDICTABLE;
- chk_call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
@@ -156,14 +160,15 @@
@hooks {
- link = handle_links_with_instruction_b_from_arm
+ fetch = help_fetching_with_instruction_b_from_arm
+ link = handle_branch_if_true_as_link
post = post_process_branch_instructions
}
@rules {
- chk_call DefineAsReturn(1)
+ //chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/opdefs/bl_A8825.d b/src/arch/arm/v7/opdefs/bl_A8825.d
index 63922dd..62ac8f9 100644
--- a/src/arch/arm/v7/opdefs/bl_A8825.d
+++ b/src/arch/arm/v7/opdefs/bl_A8825.d
@@ -39,7 +39,7 @@
@hooks {
- link = handle_links_with_instruction_bl_from_thumb
+ fetch = help_fetching_with_instruction_bl_from_thumb
post = post_process_branch_and_link_instructions
}
@@ -68,7 +68,7 @@
@hooks {
- link = handle_links_with_instruction_blx_from_thumb
+ fetch = help_fetching_with_instruction_blx_from_thumb
post = post_process_branch_and_link_instructions
}
@@ -95,7 +95,7 @@
@hooks {
- link = handle_links_with_instruction_bl_from_arm
+ fetch = help_fetching_with_instruction_bl_from_arm
post = post_process_branch_and_link_instructions
}
@@ -122,7 +122,7 @@
@hooks {
- link = handle_links_with_instruction_blx_from_arm
+ fetch = help_fetching_with_instruction_blx_from_arm
post = post_process_branch_and_link_instructions
}
diff --git a/src/arch/arm/v7/opdefs/bx_A8827.d b/src/arch/arm/v7/opdefs/bx_A8827.d
index 4856885..f8027a4 100644
--- a/src/arch/arm/v7/opdefs/bx_A8827.d
+++ b/src/arch/arm/v7/opdefs/bx_A8827.d
@@ -38,7 +38,7 @@
@hooks {
- link = handle_links_with_instruction_bx_from_thumb
+ fetch = help_fetching_with_instruction_bx_from_thumb
}
@@ -65,7 +65,7 @@
@hooks {
- link = handle_links_with_instruction_bx_from_thumb
+ fetch = help_fetching_with_instruction_bx_from_thumb
}
diff --git a/src/arch/arm/v7/opdefs/cbnz_A8829.d b/src/arch/arm/v7/opdefs/cbnz_A8829.d
index 93a8d1f..d9815c1 100644
--- a/src/arch/arm/v7/opdefs/cbnz_A8829.d
+++ b/src/arch/arm/v7/opdefs/cbnz_A8829.d
@@ -38,7 +38,7 @@
@hooks {
- link = handle_links_with_instruction_cb_n_z
+ fetch = help_fetching_with_instruction_cb_n_z
post = post_process_comp_and_branch_instructions
}
@@ -60,7 +60,7 @@
@hooks {
- link = handle_links_with_instruction_cb_n_z
+ fetch = help_fetching_with_instruction_cb_n_z
post = post_process_comp_and_branch_instructions
}
diff --git a/src/arch/arm/v7/opdefs/ldr_A8864.d b/src/arch/arm/v7/opdefs/ldr_A8864.d
index c5b0dd0..4cf0048 100644
--- a/src/arch/arm/v7/opdefs/ldr_A8864.d
+++ b/src/arch/arm/v7/opdefs/ldr_A8864.d
@@ -39,7 +39,7 @@
@hooks {
- link = handle_links_with_instruction_ldr_literal_from_thumb
+ fetch = help_fetching_with_instruction_ldr_literal_from_thumb
post = post_process_ldr_instructions
}
@@ -62,7 +62,7 @@
@hooks {
- link = handle_links_with_instruction_ldr_literal_from_thumb
+ fetch = help_fetching_with_instruction_ldr_literal_from_thumb
post = post_process_ldr_instructions
}
@@ -93,7 +93,7 @@
@hooks {
- link = handle_links_with_instruction_ldr_literal_from_arm
+ fetch = help_fetching_with_instruction_ldr_literal_from_arm
post = post_process_ldr_instructions
}
diff --git a/src/arch/arm/v7/opdefs/pop_A88131.d b/src/arch/arm/v7/opdefs/pop_A88131.d
index 2663e1b..ef5ab25 100644
--- a/src/arch/arm/v7/opdefs/pop_A88131.d
+++ b/src/arch/arm/v7/opdefs/pop_A88131.d
@@ -39,6 +39,7 @@
//if BitCount(registers) < 1 then UNPREDICTABLE;
//if registers<15> == '1' && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
+ chk_call DefineAsReturn(1)
}
@@ -60,6 +61,7 @@
//if BitCount(registers) < 2 || (P == '1' && M == '1') then UNPREDICTABLE;
//if registers<15> == '1' && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
+ chk_call DefineAsReturn(1)
}
@@ -81,6 +83,7 @@
@rules {
//if t == 13 || (t == 15 && InITBlock() && !LastInITBlock()) then UNPREDICTABLE;
+ chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/opdefs/pop_A88132.d b/src/arch/arm/v7/opdefs/pop_A88132.d
index 0c6c1b0..89c51c9 100644
--- a/src/arch/arm/v7/opdefs/pop_A88132.d
+++ b/src/arch/arm/v7/opdefs/pop_A88132.d
@@ -40,6 +40,7 @@
//if BitCount(register_list) < 2 then SEE LDM / LDMIA / LDMFD;
//if registers<13> == '1' && ArchVersion() >= 7 then UNPREDICTABLE;
+ chk_call DefineAsReturn(1)
}
@@ -62,6 +63,7 @@
@rules {
//if t == 13 then UNPREDICTABLE;
+ chk_call DefineAsReturn(1)
}
diff --git a/src/arch/arm/v7/post.c b/src/arch/arm/v7/post.c
index e6a6c2e..23d0198 100644
--- a/src/arch/arm/v7/post.c
+++ b/src/arch/arm/v7/post.c
@@ -34,6 +34,7 @@
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = accès aux données du binaire d'origine. *
* *
@@ -45,7 +46,7 @@
* *
******************************************************************************/
-void post_process_branch_instructions(GArchInstruction *instr, GProcContext *context, GBinFormat *format)
+void post_process_branch_instructions(GArchInstruction *instr, GArchProcessor *proc, GProcContext *context, GBinFormat *format)
{
GArchOperand *op; /* Opérande numérique en place */
uint32_t addr; /* Adresse visée par le saut */
@@ -97,6 +98,7 @@ void post_process_branch_instructions(GArchInstruction *instr, GProcContext *con
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = accès aux données du binaire d'origine. *
* *
@@ -108,7 +110,7 @@ void post_process_branch_instructions(GArchInstruction *instr, GProcContext *con
* *
******************************************************************************/
-void post_process_branch_and_link_instructions(GArchInstruction *instr, GProcContext *context, GBinFormat *format)
+void post_process_branch_and_link_instructions(GArchInstruction *instr, GArchProcessor *proc, GProcContext *context, GBinFormat *format)
{
GArchOperand *op; /* Opérande numérique en place */
uint32_t addr; /* Adresse visée par le saut */
@@ -160,6 +162,7 @@ void post_process_branch_and_link_instructions(GArchInstruction *instr, GProcCon
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = accès aux données du binaire d'origine. *
* *
@@ -171,7 +174,7 @@ void post_process_branch_and_link_instructions(GArchInstruction *instr, GProcCon
* *
******************************************************************************/
-void post_process_comp_and_branch_instructions(GArchInstruction *instr, GProcContext *context, GBinFormat *format)
+void post_process_comp_and_branch_instructions(GArchInstruction *instr, GArchProcessor *proc, GProcContext *context, GBinFormat *format)
{
GArchOperand *op; /* Opérande numérique en place */
uint32_t addr; /* Adresse visée par le saut */
@@ -223,6 +226,7 @@ void post_process_comp_and_branch_instructions(GArchInstruction *instr, GProcCon
/******************************************************************************
* *
* Paramètres : instr = instruction ARMv7 à traiter. *
+* proc = représentation de l'architecture utilisée. *
* context = contexte associé à la phase de désassemblage. *
* format = accès aux données du binaire d'origine. *
* *
@@ -234,7 +238,7 @@ void post_process_comp_and_branch_instructions(GArchInstruction *instr, GProcCon
* *
******************************************************************************/
-void post_process_ldr_instructions(GArchInstruction *instr, GProcContext *context, GBinFormat *format)
+void post_process_ldr_instructions(GArchInstruction *instr, GArchProcessor *proc, GProcContext *context, GBinFormat *format)
{
GArchOperand *op; /* Opérande numérique en place */
uint32_t addr; /* Adresse visée par le saut */
diff --git a/src/arch/arm/v7/post.h b/src/arch/arm/v7/post.h
index 79dcaa8..6165597 100644
--- a/src/arch/arm/v7/post.h
+++ b/src/arch/arm/v7/post.h
@@ -31,16 +31,16 @@
/* Complète un désassemblage accompli pour une instruction. */
-void post_process_branch_instructions(GArchInstruction *, GProcContext *, GBinFormat *);
+void post_process_branch_instructions(GArchInstruction *, GArchProcessor *, GProcContext *, GBinFormat *);
/* Complète un désassemblage accompli pour une instruction. */
-void post_process_branch_and_link_instructions(GArchInstruction *, GProcContext *, GBinFormat *);
+void post_process_branch_and_link_instructions(GArchInstruction *, GArchProcessor *, GProcContext *, GBinFormat *);
/* Complète un désassemblage accompli pour une instruction. */
-void post_process_comp_and_branch_instructions(GArchInstruction *, GProcContext *, GBinFormat *);
+void post_process_comp_and_branch_instructions(GArchInstruction *, GArchProcessor *, GProcContext *, GBinFormat *);
/* Complète un désassemblage accompli pour une instruction. */
-void post_process_ldr_instructions(GArchInstruction *, GProcContext *, GBinFormat *);
+void post_process_ldr_instructions(GArchInstruction *, GArchProcessor *, GProcContext *, GBinFormat *);