summaryrefslogtreecommitdiff
path: root/src/arch/arm
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/arm')
-rw-r--r--src/arch/arm/instruction.c8
-rw-r--r--src/arch/arm/instruction.h4
-rw-r--r--src/arch/arm/v7/Makefile.am6
-rw-r--r--src/arch/arm/v7/arm.c3
-rw-r--r--src/arch/arm/v7/helpers.c58
-rw-r--r--src/arch/arm/v7/helpers.h40
-rw-r--r--src/arch/arm/v7/instruction.c10
-rw-r--r--src/arch/arm/v7/instruction.h7
-rw-r--r--src/arch/arm/v7/opcodes/Makefile.am15
-rw-r--r--src/arch/arm/v7/opdefs/Makefile.am37
-rw-r--r--src/arch/arm/v7/opdefs/mov_A88104.d47
-rw-r--r--src/arch/arm/v7/opdefs/subs_B9320.d44
-rw-r--r--src/arch/arm/v7/processor.c12
13 files changed, 277 insertions, 14 deletions
diff --git a/src/arch/arm/instruction.c b/src/arch/arm/instruction.c
index c315bae..b46cab0 100644
--- a/src/arch/arm/instruction.c
+++ b/src/arch/arm/instruction.c
@@ -46,7 +46,7 @@ static const char *g_arm_instruction_get_keyword(const GArmInstruction *, AsmSyn
/* Indique le type défini pour une représentation d'une instruction ARM. */
-G_DEFINE_TYPE(GArmInstruction, g_arm_instruction, G_TYPE_ARM_INSTRUCTION);
+G_DEFINE_TYPE(GArmInstruction, g_arm_instruction, G_TYPE_ARCH_INSTRUCTION);
/******************************************************************************
@@ -160,16 +160,18 @@ static const char *g_arm_instruction_get_keyword(const GArmInstruction *instr, A
* *
* Description : Définit les conditions d'exécution d'une instruction ARM. *
* *
-* Retour : - *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-void g_arm_instruction_set_cond(GArmInstruction *instr, ArmCondCode cond)
+bool g_arm_instruction_set_cond(GArmInstruction *instr, ArmCondCode cond)
{
instr->cond = cond;
+ return true;
+
}
diff --git a/src/arch/arm/instruction.h b/src/arch/arm/instruction.h
index ecd9919..3211766 100644
--- a/src/arch/arm/instruction.h
+++ b/src/arch/arm/instruction.h
@@ -26,10 +26,12 @@
#include <glib-object.h>
+#include <stdbool.h>
#include <stdint.h>
#include "cond.h"
+#include "../instruction.h"
@@ -52,7 +54,7 @@ typedef struct _GArmInstructionClass GArmInstructionClass;
GType g_arm_instruction_get_type(void);
/* Définit les conditions d'exécution d'une instruction ARM. */
-void g_arm_instruction_set_cond(GArmInstruction *, ArmCondCode);
+bool g_arm_instruction_set_cond(GArmInstruction *, ArmCondCode);
/* Indique les conditions d'exécution d'une instruction ARM. */
ArmCondCode g_arm_instruction_get_cond(const GArmInstruction *);
diff --git a/src/arch/arm/v7/Makefile.am b/src/arch/arm/v7/Makefile.am
index dc095ed..3fe1394 100644
--- a/src/arch/arm/v7/Makefile.am
+++ b/src/arch/arm/v7/Makefile.am
@@ -3,10 +3,14 @@ noinst_LTLIBRARIES = libarcharmv7.la
libarcharmv7_la_SOURCES = \
arm.h arm.c \
+ helpers.h helpers.c \
instruction.h instruction.c \
processor.h processor.c \
register.h register.c
+libarcharmv7_la_LIBADD = \
+ opcodes/libarcharmv7opcodes.la
+
libarcharmv7_la_CFLAGS = $(AM_CFLAGS)
@@ -15,4 +19,4 @@ AM_CPPFLAGS = $(LIBGTK_CFLAGS) $(LIBXML_CFLAGS)
AM_CFLAGS = $(DEBUG_CFLAGS) $(WARNING_FLAGS) $(COMPLIANCE_FLAGS)
-SUBDIRS = #opdefs
+SUBDIRS = opdefs opcodes
diff --git a/src/arch/arm/v7/arm.c b/src/arch/arm/v7/arm.c
index 4953b6b..bd1beb8 100644
--- a/src/arch/arm/v7/arm.c
+++ b/src/arch/arm/v7/arm.c
@@ -27,6 +27,7 @@
#include <stdint.h>
+#include "opcodes/opcodes.h"
#include "../../../common/bconst.h"
@@ -82,7 +83,7 @@ static GArchInstruction *process_armv7_data_processing_register(uint32_t);
#define armv7_read_instr_cmp_register(raw) NULL
#define armv7_read_instr_cmn_register(raw) NULL
#define armv7_read_instr_orr_register(raw) NULL
-#define armv7_read_instr_mov_register_arm(raw) NULL
+//#define armv7_read_instr_mov_register_arm(raw) NULL
#define armv7_read_instr_lsl_immediate(raw) NULL
#define armv7_read_instr_lsr_immediate(raw) NULL
#define armv7_read_instr_asr_immediate(raw) NULL
diff --git a/src/arch/arm/v7/helpers.c b/src/arch/arm/v7/helpers.c
new file mode 100644
index 0000000..632c1b7
--- /dev/null
+++ b/src/arch/arm/v7/helpers.c
@@ -0,0 +1,58 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * helpers.c - aide à la mise en place des opérandes ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * OpenIDA is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * OpenIDA is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#include "helpers.h"
+
+
+#include "register.h"
+#include "../../register.h"
+
+
+
+/******************************************************************************
+* *
+* Paramètres : index = indice du registre correspondant. *
+* *
+* Description : Crée un opérande représentant un registre ARMv7. *
+* *
+* Retour : Adresse de la structure mise en place. *
+* *
+* Remarques : - *
+* *
+******************************************************************************/
+
+GArchOperand *translate_armv7_register(uint8_t index)
+{
+ GArchOperand *result; /* Opérande à faire remonter */
+ GArmV7Register *reg; /* Register à représenter */
+
+ reg = g_armv7_register_new(index);
+
+ if (reg == NULL)
+ result = NULL;
+ else
+ result = g_register_operand_new(G_ARCH_REGISTER(reg));
+
+ return result;
+
+}
diff --git a/src/arch/arm/v7/helpers.h b/src/arch/arm/v7/helpers.h
new file mode 100644
index 0000000..9ea0d74
--- /dev/null
+++ b/src/arch/arm/v7/helpers.h
@@ -0,0 +1,40 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * helpers.h - prototypes pour l'aide à la mise en place des opérandes ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * OpenIDA is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * OpenIDA is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#ifndef _ARCH_ARM_V7_HELPERS_H
+#define _ARCH_ARM_V7_HELPERS_H
+
+
+#include <stdint.h>
+
+
+#include "../../operand.h"
+
+
+
+/* Crée un opérande représentant un registre ARMv7. */
+GArchOperand *translate_armv7_register(uint8_t);
+
+
+
+#endif /* _ARCH_ARM_V7_HELPERS_H */
diff --git a/src/arch/arm/v7/instruction.c b/src/arch/arm/v7/instruction.c
index 24135f3..de81056 100644
--- a/src/arch/arm/v7/instruction.c
+++ b/src/arch/arm/v7/instruction.c
@@ -156,9 +156,9 @@ static void g_armv7_instruction_finalize(GArmV7Instruction *instr)
* *
******************************************************************************/
-GArmV7Instruction *g_armv7_instruction_new(const char *keyword)
+GArchInstruction *g_armv7_instruction_new(const char *keyword)
{
- GArmV7Instruction *result; /* Structure à retourner */
+ GArchInstruction *result; /* Structure à retourner */
result = g_object_new(G_TYPE_ARMV7_INSTRUCTION, NULL);
@@ -176,16 +176,18 @@ GArmV7Instruction *g_armv7_instruction_new(const char *keyword)
* *
* Description : Définit si une instruction ARMv7 met à jour les drapeaux. *
* *
-* Retour : - *
+* Retour : Bilan de l'opération. *
* *
* Remarques : - *
* *
******************************************************************************/
-void g_armv7_instruction_define_setflags(GArmV7Instruction *instr, bool set)
+bool g_armv7_instruction_define_setflags(GArmV7Instruction *instr, bool set)
{
instr->setflags = set;
+ return true;
+
}
diff --git a/src/arch/arm/v7/instruction.h b/src/arch/arm/v7/instruction.h
index 97ee31a..291f2c9 100644
--- a/src/arch/arm/v7/instruction.h
+++ b/src/arch/arm/v7/instruction.h
@@ -30,6 +30,9 @@
#include <stdint.h>
+#include "../../instruction.h"
+
+
#define G_TYPE_ARMV7_INSTRUCTION g_armv7_instruction_get_type()
#define G_ARMV7_INSTRUCTION(obj) (G_TYPE_CHECK_INSTANCE_CAST((obj), g_armv7_instruction_get_type(), GArmV7Instruction))
@@ -50,10 +53,10 @@ typedef struct _GArmV7InstructionClass GArmV7InstructionClass;
GType g_armv7_instruction_get_type(void);
/* Crée une instruction pour l'architecture ARMv7. */
-GArmV7Instruction *g_armv7_instruction_new(const char *);
+GArchInstruction *g_armv7_instruction_new(const char *);
/* Définit si une instruction ARMv7 met à jour les drapeaux. */
-void g_armv7_instruction_define_setflags(GArmV7Instruction *, bool);
+bool g_armv7_instruction_define_setflags(GArmV7Instruction *, bool);
/* Indique si une instruction ARMv7 met à jour les drapeaux. */
bool g_armv7_instruction_get_setflags(const GArmV7Instruction *);
diff --git a/src/arch/arm/v7/opcodes/Makefile.am b/src/arch/arm/v7/opcodes/Makefile.am
new file mode 100644
index 0000000..e77b7e8
--- /dev/null
+++ b/src/arch/arm/v7/opcodes/Makefile.am
@@ -0,0 +1,15 @@
+
+noinst_LTLIBRARIES = libarcharmv7opcodes.la
+
+libarcharmv7opcodes_la_SOURCES = \
+ mov.c \
+ subs.c
+
+libarcharmv7opcodes_la_LIBADD =
+
+libarcharmv7opcodes_la_CFLAGS = $(AM_CFLAGS)
+
+
+AM_CPPFLAGS = $(LIBGTK_CFLAGS) $(LIBXML_CFLAGS)
+
+AM_CFLAGS = $(DEBUG_CFLAGS) $(WARNING_FLAGS) $(COMPLIANCE_FLAGS)
diff --git a/src/arch/arm/v7/opdefs/Makefile.am b/src/arch/arm/v7/opdefs/Makefile.am
new file mode 100644
index 0000000..8a799b1
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/Makefile.am
@@ -0,0 +1,37 @@
+
+include ../../../../../tools/d2c.mk
+
+
+D2C_BIN = ../../../../../tools/d2c
+
+D2C_OUTDIR = $(PWD)/..
+
+D2C_ARCH = armv7
+D2C_HEADER = _ARCH_ARM_V7
+
+D2C_ENCODINGS = \
+ -e a= \
+ -e t=thumb_
+
+D2C_MACROS = \
+ -M SetFlags=g_armv7_instruction_define_setflags \
+ -M Condition=g_arm_instruction_set_cond \
+ -M Register=translate_armv7_register \
+ -M "ExpandImmC32=g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, "
+
+ARMV7_DEFS = \
+ mov_A88104.d \
+ subs_B9320.d
+
+
+all: $(ARMV7_DEFS:.d=.g) untabify_disass fix_includes_in_c finish_disass
+
+fix_includes_in_c:
+ find ../opcodes -name '*c' -exec sed -i 's/##INCLUDES##/\n#include "..\/instruction.h"\n#include "..\/..\/instruction.h"\n#include "..\/helpers.h"\n#include "..\/..\/..\/..\/common\/bconst.h"\n\n/' {} \;
+
+finish_disass: $(D2C_OUTDIR)/opcodes/opcodes.h
+ sed -i 's/##INCLUDES##/#include\ <stdint.h>\n\n#include "..\/..\/..\/instruction.h"/' $<
+ if ! grep -q 'endif' $<; then echo -en "\n\n#endif /* _ARCH_ARM_V7_OPCODES_OPCODES_H */\n" >> $< ; fi
+
+clean:
+ rm -f $(ARMV7_DEFS:.d=.g) $(D2C_OUTDIR)/opcodes/*c $(D2C_OUTDIR)/opcodes/opcodes.h
diff --git a/src/arch/arm/v7/opdefs/mov_A88104.d b/src/arch/arm/v7/opdefs/mov_A88104.d
new file mode 100644
index 0000000..1efebd3
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/mov_A88104.d
@@ -0,0 +1,47 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * Chrysalide is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chrysalide is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title MOV (register, ARM)
+
+@encoding(A1) {
+
+ @word cond(4) 0 0 0 1 1 0 1 S(1) 0 0 0 0 Rd(4) 0 0 0 0 0 0 0 0 Rm(4)
+
+ @syntax {S} {c} <Rd> <Rm>
+
+ @conv {
+
+ S = SetFlags(S)
+ c = Condition(cond)
+ Rd = Register(Rd)
+ Rm = Register(Rm)
+
+ }
+
+ @rules {
+
+ if ((Rd == '1111') && (S == '1')) ; see SUBS PC, LR and related instructions (ARM)
+
+ }
+
+}
diff --git a/src/arch/arm/v7/opdefs/subs_B9320.d b/src/arch/arm/v7/opdefs/subs_B9320.d
new file mode 100644
index 0000000..335e614
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/subs_B9320.d
@@ -0,0 +1,44 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * Chrysalide is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chrysalide is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title SUBS PC, LR and related instructions (ARM)
+
+@encoding(A1) {
+
+ @word cond(4) 0 0 1 opcode(4) 1 Rn(4) 1 1 1 1 imm12(12)
+
+ @syntax {c} <Rn> <#const>
+
+ @conv {
+
+ c = Condition(cond)
+ Rn = Register(Rn)
+ const = ExpandImmC32(imm12)
+
+ }
+
+ @rules {
+
+ }
+
+}
diff --git a/src/arch/arm/v7/processor.c b/src/arch/arm/v7/processor.c
index 3ce1623..dd2f39f 100644
--- a/src/arch/arm/v7/processor.c
+++ b/src/arch/arm/v7/processor.c
@@ -218,7 +218,7 @@ static GArchInstruction *g_armv7_processor_disassemble(const GArmV7Processor *pr
//exit(1);
- raw = 0xe1a0000a;
+
start = get_phy_addr(pos);
@@ -226,16 +226,24 @@ static GArchInstruction *g_armv7_processor_disassemble(const GArmV7Processor *pr
if (!read_u32(&raw, data, &start, end, G_ARCH_PROCESSOR(proc)->endianness))
return NULL;
+ if (raw == 0xe1a0000a)
+ printf("process @ 0x%x :: 0x%08x\n", start, raw);
+ /*
if (raw == 0xe1a0000a)
printf("read !!!!!!!\n");
-
+ */
/* TODO : thumb... */
result = process_armv7_instruction_set_encoding(raw);
+ if (raw == 0xe1a0000a)
+ printf(" --> %p\n", result);
+
+
+
if (result != NULL)
advance_vmpa(pos, 4);