Age | Commit message (Expand) | Author |
2021-01-09 | Changed some installation paths and included a pkgconfig configuration. | Cyrille Bagard |
2020-10-20 | Fixed some compilation warnings. | Cyrille Bagard |
2020-09-07 | Rewritten some code managing comments. | Cyrille Bagard |
2020-08-22 | Defined paths to access to the instruction operands. | Cyrille Bagard |
2020-07-27 | Replaced all BLC_* constants by the new DLC_* values. | Cyrille Bagard |
2020-06-21 | Reorganized the code for target operands. | Cyrille Bagard |
2020-05-21 | Changed the hierarchy of format objects. | Cyrille Bagard |
2020-04-21 | Redefined the interface for creating new processors from Python. | Cyrille Bagard |
2020-04-19 | Changed the way the key for an architecture is provided. | Cyrille Bagard |
2020-04-05 | Removed some non-POSIX variable names in Makefiles. | Cyrille Bagard |
2020-04-04 | Simplified the plugin interface. | Cyrille Bagard |
2020-03-01 | Given some priority to Elf PLT entries during the disassembly process. | Cyrille Bagard |
2020-02-29 | Broken ARMv7 basic blocks depending on conditional flags. | Cyrille Bagard |
2020-02-18 | Relocated the raw instructions. | Cyrille Bagard |
2020-02-17 | Relocated the undefined instructions. | Cyrille Bagard |
2020-02-04 | Updated copyright headers. | Cyrille Bagard |
2020-01-30 | Compressed some architecture instruction properties. | Cyrille Bagard |
2020-01-15 | Reorganized the architecture operands. | Cyrille Bagard |
2019-09-12 | Replaced some database item properties by new flags. | Cyrille Bagard |
2019-09-08 | Fixed the mask used for some ARMv7 SIMD instructions decoding. | Cyrille Bagard |
2019-05-12 | Simplified the way processors are registered. | Cyrille Bagard |
2019-03-23 | Removed references to local sources if required. | Cyrille Bagard |
2019-02-09 | Fixed another batch of memory leaks. | Cyrille Bagard |
2019-02-05 | Fixed a huge number of memory leaks. | Cyrille Bagard |
2019-02-04 | Added an option to drop Python support at compilation time. | Cyrille Bagard |
2019-01-25 | Fixed some Thumb decodings for ARMv7 branch instructions. | Cyrille Bagard |
2019-01-08 | Marked the ARMv7 branch instructions with the LR register as return points. | Cyrille Bagard |
2019-01-03 | Defined a dynamic type for each plugin. | Cyrille Bagard |
2018-11-27 | Used the format endianness when fetching ARM ldr values. | Cyrille Bagard |
2018-10-30 | Defined the parent directory as the working location for generation. | Cyrille Bagard |
2018-10-30 | Untabified code. | Cyrille Bagard |
2018-10-14 | Typo. | Cyrille Bagard |
2018-08-31 | Changed the location of installed plugins. | Cyrille Bagard |
2018-08-29 | Fixed the dist rule in Makefiles. | Cyrille Bagard |
2018-08-16 | Reorganized the Python plugin code. | Cyrille Bagard |
2018-08-11 | Added a basic check before releasing cached registers. | Cyrille Bagard |
2018-08-07 | Removed old code used for decompilation. | Cyrille Bagard |
2018-07-23 | Tracked the reference counter for plugins with more care. | Cyrille Bagard |
2018-07-19 | Deleted all references to any asm syntax. | Cyrille Bagard |
2018-06-19 | Updated Makefiles to create only one _PyGObject_API structure. | Cyrille Bagard |
2018-06-19 | Avoided to cache ARMv7 instruction keyword when unneeded. | Cyrille Bagard |
2018-06-19 | Built ARMv7 dynamic vector tables with the right number of registers. | Cyrille Bagard |
2018-06-19 | Fixed conditions for some ARMv7 SIMD instruction syntaxes. | Cyrille Bagard |
2018-06-18 | Ensured each plugin dependency can be found at runtime. | Cyrille Bagard |
2018-06-18 | Fixed various bugs in ARMv7 operand decoding helpers. | Cyrille Bagard |
2018-06-17 | Fixed a mistake in ARM registers comparisons. | Cyrille Bagard |
2018-06-06 | Hidden virtual addresses when code runs in a VM. | Cyrille Bagard |
2018-06-05 | Released the mutex even in case of register loading failure. | Cyrille Bagard |
2018-06-01 | Added a missing directory to SUBDIRS. | Cyrille Bagard |
2018-05-31 | Handled lists of simples ARMv7 SIMD registers. | Cyrille Bagard |