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/* Chrysalide - Outil d'analyse de fichiers binaires
* ##FILE## - traduction d'instructions ARMv7
*
* Copyright (C) 2014 Cyrille Bagard
*
* This file is part of Chrysalide.
*
* Chrysalide is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 3 of the License, or
* (at your option) any later version.
*
* Chrysalide is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with Foobar. If not, see <http://www.gnu.org/licenses/>.
*/
@title LDRB (immediate, Thumb)
@encoding(t1) {
@half 0 1 1 1 1 imm5(5) Rn(3) Rt(3)
@syntax <Rgt>, <access>
@conv {
Rgt = Register(Rt)
Rgn = Register(Rn)
imm32 = ZeroExtend(imm5, 5, 32)
access = MakeMemoryAccess(Rgn, imm32, 1, 0)
}
}
@encoding(T2) {
@word 1 1 1 1 1 0 0 0 1 0 0 1 Rn(4) Rt(4) imm12(12)
@syntax "ldrb.W" <Rgt>, <access>
@conv {
Rgt = Register(Rt)
Rgn = Register(Rn)
imm32 = ZeroExtend(imm12, 12, 32)
access = MakeMemoryAccess(Rgn, imm32, 1, 0)
}
@rules {
//if Rt == '1111' then SEE PLD;
//if Rn == '1111' then SEE LDRB (literal);
//if t == 13 then UNPREDICTABLE;
if (Rt == '1111'); call DefineAsReturn(1)
}
}
@encoding(T31) {
@word 1 1 1 1 1 0 0 0 0 0 0 1 Rn(4) Rt(4) 1 1 U(1) W(1) imm8(8)
@syntax <Rgt> <access>
@conv {
Rgt = Register(Rt)
Rgn = Register(Rn)
imm32 = ZeroExtend(imm8, 8, 32);
access = MakeMemoryAccess(Rgn, imm32, U, W)
}
@rules {
//if Rt == '1111' && P == '1' && U == '0' && W == '0' then SEE PLD, PLDW (immediate);
//if Rn == '1111' then SEE LDRB (literal);
//if P == '1' && U == '1' && W == '0' then SEE LDRBT;
//if P == '0' && W == '0' then UNDEFINED;
//if t == 13 || (t == 15 && W == '1') || (wback && n == t) then UNPREDICTABLE;
if (Rt == '1111'); call DefineAsReturn(1)
}
}
@encoding(T32) {
@word 1 1 1 1 1 0 0 0 0 0 0 1 Rn(4) Rt(4) 1 0 U(1) W(1) imm8(8)
@syntax <Rgt> <base> <offset>
@conv {
Rgt = Register(Rt)
Rgn = Register(Rn)
imm32 = ZeroExtend(imm8, 8, 32);
base = MakeMemoryNotIndexed(Rgn, W)
offset = MakeAccessOffset(U, imm32)
}
@rules {
//if Rt == '1111' && P == '1' && U == '0' && W == '0' then SEE PLD, PLDW (immediate);
//if Rn == '1111' then SEE LDRB (literal);
//if P == '1' && U == '1' && W == '0' then SEE LDRBT;
//if P == '0' && W == '0' then UNDEFINED;
//if t == 13 || (t == 15 && W == '1') || (wback && n == t) then UNPREDICTABLE;
if (Rt == '1111'); call DefineAsReturn(1)
}
}
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