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authorCyrille Bagard <nocbos@gmail.com>2014-12-02 22:02:34 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2014-12-02 22:02:34 (GMT)
commitf7ef27195f8c9dc35e5e210a333b74fcfae5ad71 (patch)
tree2dc288f4682dd3b1b8e5d974df3e662e3428728d
parentc72f4d81bff9d6b8fa2317823a86742cb59e0544 (diff)
Fixed sign extensions when building 32-bit mask code from bit field.
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@432 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
-rw-r--r--ChangeLog5
-rw-r--r--tools/d2c/bits.c24
2 files changed, 28 insertions, 1 deletions
diff --git a/ChangeLog b/ChangeLog
index 7bd7182..e5c5b1e 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,10 @@
14-12-02 Cyrille Bagard <nocbos@gmail.com>
+ * tools/d2c/bits.c:
+ Fix sign extensions when building 32-bit mask code from bit field.
+
+14-12-02 Cyrille Bagard <nocbos@gmail.com>
+
* src/arch/arm/v7/opdefs/Makefile.am:
Distinguish Thumb 16 and Thumb 32. Add 'mov_A88102.d' to ARMV7_DEFS.
diff --git a/tools/d2c/bits.c b/tools/d2c/bits.c
index 32c3fd9..4169acf 100644
--- a/tools/d2c/bits.c
+++ b/tools/d2c/bits.c
@@ -324,7 +324,29 @@ bool declare_used_bits_fields(const coding_bits *bits, int fd, unsigned int wide
bool check_bits_correctness(const coding_bits *bits, int fd)
{
- dprintf(fd, "\t\tif ((raw & 0x%" PRIx64 ") != 0x%" PRIx64 ") return NULL;\n", bits->mask, bits->bits);
+ switch (bits->curpos)
+ {
+ case 8:
+ dprintf(fd, "\t\tif ((raw & 0x%" PRIx8 ") != 0x%" PRIx8 ") return NULL;\n",
+ (uint8_t)bits->mask, (uint8_t)bits->bits);
+ break;
+
+ case 16:
+ dprintf(fd, "\t\tif ((raw & 0x%" PRIx16 ") != 0x%" PRIx16 ") return NULL;\n",
+ (uint16_t)bits->mask, (uint16_t)bits->bits);
+ break;
+
+ case 32:
+ dprintf(fd, "\t\tif ((raw & 0x%" PRIx32 ") != 0x%" PRIx32 ") return NULL;\n",
+ (uint32_t)bits->mask, (uint32_t)bits->bits);
+ break;
+
+ case 64:
+ dprintf(fd, "\t\tif ((raw & 0x%" PRIx64 ") != 0x%" PRIx64 ") return NULL;\n",
+ bits->mask, bits->bits);
+ break;
+
+ }
return true;