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authorCyrille Bagard <nocbos@gmail.com>2016-05-06 21:19:50 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2016-05-06 21:19:50 (GMT)
commit2fc5cc35c256d5bdbe72a1218082e91ddbc3e193 (patch)
tree2d151e3e79748d730c7f029b46dd488991915b5a /src/arch/arm/v7/arm.c
parent33d49eb64654fc5dc5f617ce02ae3fffb6a75adb (diff)
Prepared the ARMv7 SIMD instructions support.
Diffstat (limited to 'src/arch/arm/v7/arm.c')
-rw-r--r--src/arch/arm/v7/arm.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/arch/arm/v7/arm.c b/src/arch/arm/v7/arm.c
index 542d521..af92096 100644
--- a/src/arch/arm/v7/arm.c
+++ b/src/arch/arm/v7/arm.c
@@ -24,10 +24,10 @@
#include "arm.h"
-#include <assert.h>
#include <stdint.h>
+#include "simd.h"
#include "opcodes/arm_opcodes.h"
#include "opcodes/opcodes_tmp_arm.h"
#include "../../undefined.h"
@@ -2241,12 +2241,10 @@ static GArchInstruction *process_armv7_arm_memory_hints_advanced_simd_instructio
}
else if ((op1 & b1100000) == b0100000)
- /* Advanced SIMD data-processing instructions */
- assert(false);
+ result = process_armv7_simd_advanced_simd_data_processing_instructions(raw, true);
else if ((op1 & b1110001) == b1000000)
- /* Advanced SIMD element or structure load/store instructions */
- assert(false);
+ result = process_armv7_simd_advanced_simd_element_or_structure_load_store_instructions(raw, true);
else if ((op1 & b1110111) == b1000001)
result = g_undef_instruction_new(IBS_NOP);