diff options
| author | Cyrille Bagard <nocbos@gmail.com> | 2008-10-27 20:00:09 (GMT) |
|---|---|---|
| committer | Cyrille Bagard <nocbos@gmail.com> | 2008-10-27 20:00:09 (GMT) |
| commit | 2e5893f9261ba59e06fadcc6ddfa9a1253e286b3 (patch) | |
| tree | 8197f6419812e7c36c28d6849ced3e37e8926539 /src/arch/x86/instruction.h | |
| parent | 197933fdf469ab9b8897b33c51809c128f1e3c03 (diff) | |
Extended the current opcode support (0x01, 0x72, 0x73, 0x88, 0xd3, 0xf7, 0xfc, 0xb6 and 0xbe).
git-svn-id: svn://svn.gna.org/svn/chrysalide/trunk@38 abbe820e-26c8-41b2-8c08-b7b2b41f8b0a
Diffstat (limited to 'src/arch/x86/instruction.h')
| -rw-r--r-- | src/arch/x86/instruction.h | 29 |
1 files changed, 21 insertions, 8 deletions
diff --git a/src/arch/x86/instruction.h b/src/arch/x86/instruction.h index 1c97255..0092ba0 100644 --- a/src/arch/x86/instruction.h +++ b/src/arch/x86/instruction.h @@ -39,6 +39,7 @@ typedef struct _asm_x86_instr asm_x86_instr; typedef enum _X86Opcodes { X86_OP_ADD_RM8_R8, /* add (0x00) */ + X86_OP_ADD_RM1632_R1632, /* add ([0x66] 0x01) */ X86_OP_SUB_R1632_RM1632, /* sub ([0x66] 0x29) */ @@ -89,6 +90,9 @@ typedef enum _X86Opcodes X86_OP_PUSH_IMM1632, /* push ([0x66] 0x68) */ + X86_OP_JB_REL8, /* jb (0x72) */ + X86_OP_JNB_REL8, /* jnb (0x73) */ + X86_OP_JE_8, /* je (0x74) */ X86_OP_JNE_8, /* jne (0x75) */ @@ -116,6 +120,7 @@ typedef enum _X86Opcodes X86_OP_TEST_RM8_R8, /* test ([0x66] 0x84) */ X86_OP_TEST_RM1632_R1632, /* test ([0x66] 0x85) */ + X86_OP_MOV_RM8_R8, /* mov (0x88) */ X86_OP_MOV_RM1632_R1632, /* mov ([0x66] 0x89) */ X86_OP_MOV_R1632_RM1632, /* mov ([0x66] 0x8b) */ @@ -141,14 +146,14 @@ typedef enum _X86Opcodes X86_OP_MOV_E_SI, /* mov ([0x66] 0xbe) */ X86_OP_MOV_E_DI, /* mov ([0x66] 0xbf) */ - X86_OP_ROL_RM1632_IMM8, /* rol ([0x66 0xc1 0) */ - X86_OP_ROR_RM1632_IMM8, /* ror ([0x66 0xc1 1) */ - X86_OP_RCL_RM1632_IMM8, /* rcl ([0x66 0xc1 2) */ - X86_OP_RCR_RM1632_IMM8, /* rcr ([0x66 0xc1 3) */ - X86_OP_SHL_RM1632_IMM8, /* shl ([0x66 0xc1 4) */ - X86_OP_SHR_RM1632_IMM8, /* shr ([0x66 0xc1 5) */ - X86_OP_SAL_RM1632_IMM8, /* sal ([0x66 0xc1 6) */ - X86_OP_SAR_RM1632_IMM8, /* sar ([0x66 0xc1 7) */ + X86_OP_ROL_RM1632_IMM8, /* rol ([0x66] 0xc1 0) */ + X86_OP_ROR_RM1632_IMM8, /* ror ([0x66] 0xc1 1) */ + X86_OP_RCL_RM1632_IMM8, /* rcl ([0x66] 0xc1 2) */ + X86_OP_RCR_RM1632_IMM8, /* rcr ([0x66] 0xc1 3) */ + X86_OP_SHL_RM1632_IMM8, /* shl ([0x66] 0xc1 4) */ + X86_OP_SHR_RM1632_IMM8, /* shr ([0x66] 0xc1 5) */ + X86_OP_SAL_RM1632_IMM8, /* sal ([0x66] 0xc1 6) */ + X86_OP_SAR_RM1632_IMM8, /* sar ([0x66] 0xc1 7) */ X86_OP_RET, /* ret (0xc3) */ @@ -159,6 +164,8 @@ typedef enum _X86Opcodes X86_OP_INT, /* int (0xcd) */ + X86_OP_SHL_RM1632_CL, /* shl ([0x66] 0xd3 4) */ + X86_OP_CALL_REL1632, /* call ([0x66] 0xe8) */ X86_OP_JMP_REL1632, /* jmp ([0x66] 0xe9) */ @@ -166,12 +173,18 @@ typedef enum _X86Opcodes X86_OP_HLT, /* hlt (0xf4) */ + X86_OP_NOT_RM1632, /* not ([0x66] 0xf7 2) */ + + X86_OP_CLD, /* cld (0xfc) */ + X86_OP_CALL_RM1632, /* call ([0x66] 0xff 2) */ X86_OP_JMP_RM1632, /* jmp ([0x66] 0xff 4) */ X86_OP_PUSH_RM1632, /* push ([0x66] 0xff 6) */ X86_OP_MOVZX_R1632_RM8, /* movzx ([0x66] 0x0f 0xb6) */ + X86_OP_MOVSX_R1632_RM8, /* movsx ([0x66] 0x0f 0xbe) */ + X86_OP_COUNT } X86Opcodes; |