diff options
Diffstat (limited to 'plugins/arm/v7/helpers.h')
| -rw-r--r-- | plugins/arm/v7/helpers.h | 500 |
1 files changed, 226 insertions, 274 deletions
diff --git a/plugins/arm/v7/helpers.h b/plugins/arm/v7/helpers.h index 94b85f9..aa3de34 100644 --- a/plugins/arm/v7/helpers.h +++ b/plugins/arm/v7/helpers.h @@ -25,245 +25,265 @@ #define _PLUGINS_ARM_V7_HELPERS_H -#include <arch/operand.h> +#include <arch/immediate.h> +#include <arch/register.h> -#include "cregister.h" #include "pseudo.h" +#include "register.h" #include "operands/coproc.h" #include "operands/estate.h" -#include "operands/limitation.h" #include "operands/maccess.h" -#include "operands/offset.h" #include "operands/reglist.h" #include "operands/rotation.h" #include "operands/shift.h" -#include "../register.h" +/** + * Définitions élaborées à partir des spécifications. + */ -#define BarrierLimitation(opt) \ - ({ \ - GArchOperand *__result; \ - __result = g_armv7_limitation_operand_new(opt); \ - __result; \ +#define ARMExpandImm(imm12) \ + ({ \ + GArchOperand *__result; \ + uint32_t __val; \ + if (armv7_arm_expand_imm(imm12, &__val)) \ + __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __val); \ + else \ + __result = NULL; \ + __result; \ }) -#define BitDiff(msb, lsb) \ - ({ \ - GArchOperand *__result; \ - uint32_t __width; \ - __width = g_imm_operand_get_raw_value(G_IMM_OPERAND(msb)); \ - __width -= g_imm_operand_get_raw_value(G_IMM_OPERAND(lsb)); \ - __width += 1; \ - __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __width); \ - __result; \ +#define ARMExpandImm_C(imm12, c) \ + ({ \ + GArchOperand *__result; \ + uint32_t __val; \ + if (armv7_arm_expand_imm_c(imm12, (bool []) { c }, &__val)) \ + __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __val); \ + else \ + __result = NULL; \ + __result; \ }) -#define BuildImm8(val) \ - ({ \ - GArchOperand *__result; \ - __result = g_imm_operand_new_from_value(MDS_8_BITS_UNSIGNED, (uint8_t)val); \ - __result; \ +#define BitDiff(msb, lsb) \ + ({ \ + GArchOperand *__result; \ + uint32_t __width; \ + __width = msb - lsb + 1; \ + __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __width); \ + __result; \ }) -#define BuildImm16(val) \ - ({ \ - GArchOperand *__result; \ - __result = g_imm_operand_new_from_value(MDS_16_BITS_UNSIGNED, (uint16_t)val); \ - __result; \ +#define BuildRegShift(type, reg) \ + ({ \ + GArchOperand *__result; \ + SRType __shift_t; \ + if (!armv7_decode_reg_shift(type, &__shift_t)) \ + __result = NULL; \ + else \ + __result = g_armv7_shift_operand_new(__shift_t, reg); \ + __result; \ }) -#define CoProcessor(idx) \ - ({ \ - GArchOperand *__result; \ - __result = g_armv7_coproc_operand_new(idx); \ - __result; \ +#define CoProcessor(idx) \ + ({ \ + GArchOperand *__result; \ + __result = g_armv7_coproc_operand_new(idx); \ + __result; \ }) -#define CRegister(idx) \ - ({ \ - GArchOperand *__result; \ - GArmV7CRegister *__reg; \ - __reg = g_armv7_cregister_new(idx); \ - if (__reg == NULL) \ - __result = NULL; \ - else \ - __result = g_register_operand_new(G_ARCH_REGISTER(__reg)); \ - __result; \ +#define DecodeImmShift(type, imm5) \ + ({ \ + GArchOperand *__result; \ + SRType __shift_t; \ + uint8_t __shift_n; \ + GArchOperand *__op_n; \ + if (!armv7_decode_imm_shift(type, imm5, &__shift_t, &__shift_n)) \ + __result = NULL; \ + else \ + { \ + __op_n = g_imm_operand_new_from_value(MDS_8_BITS_UNSIGNED, __shift_n); \ + __result = g_armv7_shift_operand_new(__shift_t, __op_n); \ + } \ + __result; \ }) -#define IncWidth(widthm1) \ - ({ \ - GArchOperand *__result; \ - uint32_t __width; \ - __width = widthm1 + 1; \ - __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __width); \ - __result; \ +#define DecodeImmShiftAmount(type, imm5) \ + ({ \ + GArchOperand *__result; \ + uint8_t __shift_n; \ + if (!armv7_decode_imm_shift(type, imm5, (SRType []) { 0 }, &__shift_n)) \ + __result = NULL; \ + else \ + __result = g_imm_operand_new_from_value(MDS_8_BITS_UNSIGNED, __shift_n);\ + __result; \ }) -#define DecodeImmShift(type, imm5) \ - ({ \ - GArchOperand *__result; \ - SRType __shift_t; \ - uint32_t __shift_n; \ - GArchOperand *__op_n; \ - if (!armv7_decode_imm_shift(type, imm5, &__shift_t, &__shift_n)) \ - __result = NULL; \ - else \ - { \ - __op_n = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __shift_n); \ - __result = g_armv7_shift_operand_new(__shift_t, __op_n); \ - } \ - __result; \ +#define Endian(big) \ + ({ \ + GArchOperand *__result; \ + __result = g_armv7_endian_operand_new(big); \ + __result; \ }) -#define EndianState(big) \ - ({ \ - GArchOperand *__result; \ - __result = g_armv7_endian_operand_new(big); \ - __result; \ +#define FixedShift(type, imm5) \ + ({ \ + GArchOperand *__result; \ + uint8_t __shift_n; \ + __shift_n = imm5; \ + __result = g_imm_operand_new_from_value(MDS_8_BITS_UNSIGNED, __shift_n); \ + __result; \ }) -#define MakeMemoryAccess(base, off, shift, index, add, wback) \ - ({ \ - GArchOperand *__result; \ - GArchOperand *__offset; \ - if (off != NULL) \ - __offset = g_armv7_offset_operand_new(add, off); \ - else \ - __offset = NULL; \ - __result = g_armv7_maccess_operand_new(base, __offset, shift, index, wback); \ - __result; \ +#define MemAccessOffset(base, off) \ + ({ \ + GArchOperand *__result; \ + __result = g_armv7_maccess_operand_new(base, off, NULL, false, false); \ + __result; \ }) -#define NextRegister(prev) \ - ({ \ - GRegisterOperand *__prev_op; \ - GArchRegister *__reg; \ - uint8_t __id; \ - __prev_op = G_REGISTER_OPERAND(prev); \ - __reg = g_register_operand_get_register(__prev_op); \ - __id = g_arm_register_get_index(G_ARM_REGISTER(__reg)); \ - Register(__id + 1); \ +#define MemAccessOffsetExtended(base, off, shift) \ + ({ \ + GArchOperand *__result; \ + __result = g_armv7_maccess_operand_new(base, off, shift, false, false); \ + __result; \ }) -#define RawValue(val) \ - ({ \ - GArchOperand *__result; \ - __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, (uint32_t)val); \ - __result; \ +#define MemAccessPreIndexed(base, off) \ + ({ \ + GArchOperand *__result; \ + __result = g_armv7_maccess_operand_new(base, off, NULL, false, true); \ + __result; \ }) -#define Register(idx) \ - ({ \ - GArchOperand *__result; \ - GArmV7Register *__reg; \ - __reg = g_armv7_register_new(idx); \ - if (__reg == NULL) \ - __result = NULL; \ - else \ - __result = g_register_operand_new(G_ARCH_REGISTER(__reg)); \ - __result; \ +#define MemAccessPreIndexedExtended(base, off, shift) \ + ({ \ + GArchOperand *__result; \ + __result = g_armv7_maccess_operand_new(base, off, shift, false, true); \ + __result; \ }) -#define RegisterShift(shift_t, rs) \ - ({ \ - GArchOperand *__result; \ - GArchOperand *__reg; \ - __reg = Register(rs); \ - if (__reg == NULL) \ - __result = NULL; \ - else \ - __result = g_armv7_shift_operand_new(shift_t, __reg); \ - __result; \ +#define MemAccessPostIndexed(base, off) \ + ({ \ + GArchOperand *__result; \ + __result = g_armv7_maccess_operand_new(base, off, NULL, true, true); \ + __result; \ }) -#define Rotation(val5) \ +#define MemAccessPostIndexedExtended(base, off, shift) \ ({ \ GArchOperand *__result; \ - uint8_t __rot; \ - GArchOperand *__rot_op; \ - __rot = val5; \ - __rot_op = g_imm_operand_new_from_value(MDS_8_BITS_UNSIGNED, __rot); \ - __result = g_armv7_rotation_operand_new(__rot_op); \ - if (__result == NULL) \ - g_object_unref(G_OBJECT(__rot_op)); \ + __result = g_armv7_maccess_operand_new(base, off, shift, true, true); \ __result; \ }) -#define UInt(val) \ - ({ \ - GArchOperand *__result; \ - __result = g_imm_operand_new_from_value(MDS_8_BITS_UNSIGNED, (uint8_t)val); \ - __result; \ +#define MinusBitDiff(msb, lsb) \ + ({ \ + GArchOperand *__result; \ + uint32_t __width; \ + __width = msb - lsb + 1 + 1; \ + __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __width); \ + __result; \ }) +#define NextRegister(idx) \ + ({ \ + GArchOperand *__result; \ + GArmV7Register *__reg; \ + __reg = g_armv7_register_new(idx + 1); \ + if (__reg == NULL) \ + __result = NULL; \ + else \ + __result = g_register_operand_new(G_ARCH_REGISTER(__reg)); \ + __result; \ + }) -//#define DecodeImmShift(raw_type, raw_imm5); -//g_armv7_shift_operand_new(SRType type, GArchOperand *value) - - - -//#define MakeMemoryAccess(base, off, shift, index, add, wback) NULL - -//g_armv7_maccess_operand_new(GArchOperand *base, GArchOperand *offset, GArchOperand *shift, bool indexed, bool writeb) +#define SignExtend(val, size, top) \ + ({ \ + GArchOperand *__result; \ + MemoryDataSize __mds; \ + uint ## size ## _t __val; \ + __mds = MDS_ ## size ## _BITS_SIGNED; \ + __val = armv7_sign_extend(val, top, size); \ + __result = g_imm_operand_new_from_value(__mds, __val); \ + __result; \ + }) -//g_armv7_offset_operand_new(add, off) +#define SingleRegList(t) \ + ({ \ + GArchOperand *__result; \ + __result = g_armv7_reglist_operand_new(1 << t); \ + __result; \ + }) +#define Register(idx) \ + ({ \ + GArchOperand *__result; \ + GArmV7Register *__reg; \ + __reg = g_armv7_register_new(idx); \ + if (__reg == NULL) \ + __result = NULL; \ + else \ + __result = g_register_operand_new(G_ARCH_REGISTER(__reg)); \ + __result; \ + }) -//////////////////// -#define Imm16(imm16) \ - ({ \ - GArchOperand *__result; \ - __result = g_imm_operand_new_from_value(MDS_16_BITS_UNSIGNED, (uint16_t)imm16); \ - __result; \ +#define RegList(mask) \ + ({ \ + GArchOperand *__result; \ + __result = g_armv7_reglist_operand_new(mask); \ + __result; \ }) -#define ARMExpandImm_C(imm12, c) \ + +#define Rotation(val5) \ ({ \ GArchOperand *__result; \ - uint32_t __val; \ - if (armv7_arm_expand_imm_c(imm12, (bool []) { c }, &__val)) \ - __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __val); \ - else \ - __result = NULL; \ + uint8_t __rot; \ + GArchOperand *__rot_op; \ + __rot = val5; \ + __rot_op = g_imm_operand_new_from_value(MDS_8_BITS_UNSIGNED, __rot); \ + __result = g_armv7_rotation_operand_new(__rot_op); \ + if (__result == NULL) \ + g_object_unref(G_OBJECT(__rot_op)); \ __result; \ }) -#define ARMExpandImm(imm12) \ + +#define ThumbExpandImm(imm12) \ ({ \ GArchOperand *__result; \ uint32_t __val; \ - if (armv7_arm_expand_imm(imm12, &__val)) \ + if (armv7_thumb_expand_imm(imm12, &__val)) \ __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __val); \ else \ __result = NULL; \ __result; \ }) + #define ThumbExpandImm_C(imm12, c) \ ({ \ GArchOperand *__result; \ @@ -275,166 +295,98 @@ __result; \ }) -#define ThumbExpandImm(imm12) \ + +#define UInt(val) \ ({ \ GArchOperand *__result; \ - uint32_t __val; \ - if (armv7_thumb_expand_imm(imm12, &__val)) \ - __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __val); \ - else \ - __result = NULL; \ + __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, val); \ __result; \ }) - - - - - -#define DecodeImmShiftValue(imm5) \ - ({ \ - GArchOperand *__result; \ - uint32_t __shift_n; \ - if (!armv7_decode_imm_shift(0, imm5, (SRType []) { 0 }, &__shift_n)) \ - __result = NULL; \ - else \ - __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __shift_n); \ - __result; \ +#define UIntInc(sat4) \ + ({ \ + GArchOperand *__result; \ + uint8_t __val; \ + __val = sat4; \ + __result = g_imm_operand_new_from_value(MDS_8_BITS_UNSIGNED, __val); \ + __result; \ }) -#if 0 -// DecodeRegShift() -// ================ -SRType DecodeRegShift(bits(2) type) -case type of -when '00' shift_t = SRType_LSL; -when '01' shift_t = SRType_LSR; -when '10' shift_t = SRType_ASR; -when '11' shift_t = SRType_ROR; -return shift_t; -#endif - - - -#define ZeroExtend(x, i) \ - ({ \ - MemoryDataSize __mds; \ - uint ## i ## _t __val; \ - __mds = MDS_ ## i ## _BITS_UNSIGNED; \ - __val = armv7_zero_extend(x, 0/**/, i); \ - g_imm_operand_new_from_value(__mds, __val); \ +#define Zeros(i) \ + ({ \ + GArchOperand *__result; \ + MemoryDataSize __mds; \ + uint ## i ## _t __val; \ + __mds = MDS_ ## i ## _BITS_UNSIGNED; \ + __val = 0; \ + __result = g_imm_operand_new_from_value(__mds, __val); \ + __result; \ }) - -#define Zeros(i) \ - ({ \ - MemoryDataSize __mds; \ - uint ## i ## _t __val; \ - __mds = MDS_ ## i ## _BITS_UNSIGNED; \ - __val = 0; \ - g_imm_operand_new_from_value(__mds, __val); \ +#define ZeroExtend(x, i) \ + ({ \ + GArchOperand *__result; \ + MemoryDataSize __mds; \ + uint ## i ## _t __val; \ + __mds = MDS_ ## i ## _BITS_UNSIGNED; \ + __val = armv7_zero_extend(x, -1, i); \ + __result = g_imm_operand_new_from_value(__mds, __val); \ + __result; \ }) - - - - - - /** - * Glue purement interne. + * Définitions complémentaires. */ -#define MakeAccessOffset(add, off) \ - g_armv7_offset_operand_new(add, off) - - -#define MakeShiftedMemoryAccess(base, off, shift, wr) \ - g_armv7_maccess_operand_new(base, off, shift, wr) +#define APSR_C 0 -#define _MakeMemoryAccess(base, off, wr) \ - MakeShiftedMemoryAccess(base, off, NULL, wr) - -/* -#define MakeMemoryAccess(base, off, add, wr) \ - ({ \ - GArchOperand *__off; \ - __off = MakeAccessOffset(add, off); \ - _MakeMemoryAccess(base, __off, wr); \ - }) -*/ - -#define MakeMemoryNotIndexed(base, wr) \ - _MakeMemoryAccess(base, NULL, wr) - - - - - - - - -// type == '10', pas 2 ! (FIXME) -#define FixedShift(type, imm5) \ - ({ \ - GArchOperand *__result; \ - uint32_t __shift_n; \ - __shift_n = imm5; \ - __result = g_imm_operand_new_from_value(MDS_32_BITS_UNSIGNED, __shift_n); \ - __result; \ - }) +/** + * Petite glue vers le format ARM générique... + */ +#define g_armv7_instruction_extend_keyword(ins, ext) \ + g_arm_instruction_extend_keyword(G_ARM_INSTRUCTION(ins), ext) /** - * Glue purement interne pour les listes de registres. + * Vieilleries à conserver au cas où... */ -#define RegistersList(mask) \ - ({ \ - GArchOperand *__result; \ - __result = g_armv7_reglist_operand_new(); \ - if (!g_armv7_reglist_load_registers(G_ARMV7_REGLIST_OPERAND(__result), mask)) \ - { \ - g_object_unref(G_OBJECT(__result)); \ - __result = NULL; \ - } \ - __result; \ - }) - - -#define ListFromRegister(regop) \ - ({ \ - GArchOperand *__result; \ - GArmV7Register *__reg; \ - __result = g_armv7_reglist_operand_new(); \ - __reg = G_ARMV7_REGISTER(regop); \ - g_armv7_reglist_add_register(G_ARMV7_REGLIST_OPERAND(__result), __reg); \ - __result; \ - }) +#if 0 +#include "cregister.h" +#include "operands/limitation.h" -/* Effectue une rotation vers la droit d'une valeur. */ -GArchOperand *ror_armv7_imm(uint32_t, unsigned int); +#define BarrierLimitation(opt) \ + ({ \ + GArchOperand *__result; \ + __result = g_armv7_limitation_operand_new(opt); \ + __result; \ + }) -/* Crée un opérande de valeur immédiate avec extension de signe. */ -GArchOperand *sign_extend_armv7_imm(uint32_t, bool, unsigned int); -/* Etend une valeur immédiate en mode 'Thumb' ARMv7. */ -GArchOperand *thumb_expand_armv7_imm(uint32_t); +#define CRegister(idx) \ + ({ \ + GArchOperand *__result; \ + GArmV7CRegister *__reg; \ + __reg = g_armv7_cregister_new(idx); \ + if (__reg == NULL) \ + __result = NULL; \ + else \ + __result = g_register_operand_new(G_ARCH_REGISTER(__reg)); \ + __result; \ -/* Réalise un simple transtypage de valeur entière. */ -GArchOperand *zero_extend_armv7_imm(uint32_t, unsigned int); +#endif |