diff options
Diffstat (limited to 'plugins/arm/v7/opdefs/b_A8818.d')
| -rw-r--r-- | plugins/arm/v7/opdefs/b_A8818.d | 81 |
1 files changed, 53 insertions, 28 deletions
diff --git a/plugins/arm/v7/opdefs/b_A8818.d b/plugins/arm/v7/opdefs/b_A8818.d index 9e27753..abd542f 100644 --- a/plugins/arm/v7/opdefs/b_A8818.d +++ b/plugins/arm/v7/opdefs/b_A8818.d @@ -2,7 +2,7 @@ /* Chrysalide - Outil d'analyse de fichiers binaires * ##FILE## - traduction d'instructions ARMv7 * - * Copyright (C) 2015 Cyrille Bagard + * Copyright (C) 2017 Cyrille Bagard * * This file is part of Chrysalide. * @@ -23,23 +23,33 @@ @title B -@desc Branch causes a branch to a target address. +@id 17 + +@desc { + + Branch causes a branch to a target address. + +} @encoding (t1) { @half 1 1 0 1 cond(4) imm8(8) - @syntax <imm32> + @syntax { - @conv { + @conv { - imm32 = SignExtend(imm8:'0', imm8 & 0x80, 32) + imm32 = SignExtend(imm8:'0', 32, 8) - } + } - @rules { + @asm b imm32 - chk_call StoreCondition(cond) + @rules { + + check g_arm_instruction_set_cond(cond) + + } } @@ -57,11 +67,15 @@ @half 1 1 1 0 0 imm11(11) - @syntax <imm32> + @syntax { + + @conv { + + imm32 = SignExtend(imm11:'0', 32, 11) - @conv { + } - imm32 = SignExtend(imm11:'0', imm11 & 0x400, 32) + @asm b imm32 } @@ -79,17 +93,22 @@ @word 1 1 1 1 0 S(1) cond(4) imm6(6) 1 0 J1(1) 0 J2(1) imm11(11) - @syntax ".W" <imm32> + @syntax { - @conv { + @conv { - imm32 = SignExtend(S:J2:J1:imm6:imm11:'0', S & 0x1, 32) + imm32 = SignExtend(S:J2:J1:imm6:imm11:'0', 32, 20) - } + } + + @asm b imm32 - @rules { + @rules { - chk_call StoreCondition(cond) + check g_arm_instruction_set_cond(cond) + check g_armv7_instruction_extend_keyword(".W") + + } } @@ -107,13 +126,15 @@ @word 1 1 1 1 0 S(1) imm10(10) 1 0 J1(1) 1 J2(1) imm11(11) - @syntax ".W" <imm32> + @syntax { + + @conv { - @conv { + imm32 = SignExtend(S:J2:J1:imm10:imm11:'0', 32, 24) - I1 = NOT(J1 EOR S) - I2 = NOT(J2 EOR S) - imm32 = SignExtend(S:I1:I2:imm10:imm11:'0', S & 0x1, 32) + } + + @asm b.w imm32 } @@ -131,17 +152,21 @@ @word cond(4) 1 0 1 0 imm24(24) - @syntax <imm32> + @syntax { - @conv { + @conv { - imm32 = SignExtend(imm24:'00', imm24 & 0x800000, 32) + imm32 = SignExtend(imm24:'00', 32, 25) - } + } + + @asm b imm32 + + @rules { - @rules { + check g_arm_instruction_set_cond(cond) - chk_call StoreCondition(cond) + } } |