diff options
Diffstat (limited to 'plugins/arm/v7/opdefs/bfi_A8820.d')
| -rw-r--r-- | plugins/arm/v7/opdefs/bfi_A8820.d | 52 |
1 files changed, 33 insertions, 19 deletions
diff --git a/plugins/arm/v7/opdefs/bfi_A8820.d b/plugins/arm/v7/opdefs/bfi_A8820.d index 1d2bb2f..ac33950 100644 --- a/plugins/arm/v7/opdefs/bfi_A8820.d +++ b/plugins/arm/v7/opdefs/bfi_A8820.d @@ -2,7 +2,7 @@ /* Chrysalide - Outil d'analyse de fichiers binaires * ##FILE## - traduction d'instructions ARMv7 * - * Copyright (C) 2015 Cyrille Bagard + * Copyright (C) 2017 Cyrille Bagard * * This file is part of Chrysalide. * @@ -23,21 +23,31 @@ @title BFI -@desc Bit Field Insert copies any number of low order bits from a register into the same number of adjacent bits at any position in the destination register. +@id 19 + +@desc { + + Bit Field Insert copies any number of low order bits from a register into the same number of adjacent bits at any position in the destination register. + +} @encoding (T1) { @word 1 1 1 1 0 0 1 1 0 1 1 0 Rn(4) 0 imm3(3) Rd(4) imm2(2) 0 msb(5) - @syntax <reg_D> <reg_N> <lsbit> <width> + @syntax { + + @conv { - @conv { + reg_D = Register(Rd) + reg_N = Register(Rn) + lsbit = UInt(imm3:imm2) + msbit = UInt(msb) + width = BitDiff(msbit, lsbit) - reg_D = Register(Rd) - reg_N = Register(Rn) - msbit = UInt(msb) - lsbit = UInt(imm3:imm2) - width = BitDiff(msbit, lsbit) + } + + @asm bfi reg_D reg_N lsbit width } @@ -47,21 +57,25 @@ @word cond(4) 0 1 1 1 1 1 0 msb(5) Rd(4) lsb(5) 0 0 1 Rn(4) - @syntax <reg_D> <reg_N> <lsbit> <width> + @syntax { - @conv { + @conv { - reg_D = Register(Rd) - reg_N = Register(Rn) - msbit = UInt(msb) - lsbit = UInt(lsb) - width = BitDiff(msbit, lsbit) + reg_D = Register(Rd) + reg_N = Register(Rn) + lsbit = UInt(lsb) + msbit = UInt(msb) + width = BitDiff(msbit, lsbit) - } + } + + @asm bfi reg_D reg_N lsbit width + + @rules { - @rules { + check g_arm_instruction_set_cond(cond) - chk_call StoreCondition(cond) + } } |