diff options
Diffstat (limited to 'plugins/arm/v7/opdefs/cdp_A8830.d')
| -rw-r--r-- | plugins/arm/v7/opdefs/cdp_A8830.d | 94 |
1 files changed, 55 insertions, 39 deletions
diff --git a/plugins/arm/v7/opdefs/cdp_A8830.d b/plugins/arm/v7/opdefs/cdp_A8830.d index 109b89b..6d2148d 100644 --- a/plugins/arm/v7/opdefs/cdp_A8830.d +++ b/plugins/arm/v7/opdefs/cdp_A8830.d @@ -2,7 +2,7 @@ /* Chrysalide - Outil d'analyse de fichiers binaires * ##FILE## - traduction d'instructions ARMv7 * - * Copyright (C) 2015 Cyrille Bagard + * Copyright (C) 2017 Cyrille Bagard * * This file is part of Chrysalide. * @@ -23,22 +23,32 @@ @title CDP, CDP2 -@desc Coprocessor Data Processing tells a coprocessor to perform an operation that is independent of ARM core registers and memory. If no coprocessor can execute the instruction, an Undefined Instruction exception is generated. This is a generic coprocessor instruction. Some of the fields have no functionality defined by the architecture and are free for use by the coprocessor instruction set designer. These are the opc1, opc2, CRd, CRn, and CRm fields. However, coprocessors CP8-CP15 are reserved for use by ARM, and this manual defines the valid CDP and CDP2 instructions when coproc is in the range p8-p15. For more information see Coprocessor support on page A2-94. +@id 29 + +@desc { + + Coprocessor Data Processing tells a coprocessor to perform an operation that is independent of ARM core registers and memory. If no coprocessor can execute the instruction, an Undefined Instruction exception is generated. This is a generic coprocessor instruction. Some of the fields have no functionality defined by the architecture and are free for use by the coprocessor instruction set designer. These are the opc1, opc2, CRd, CRn, and CRm fields. However, coprocessors CP8-CP15 are reserved for use by ARM, and this manual defines the valid CDP and CDP2 instructions when coproc is in the range p8-p15. For more information see Coprocessor support on page A2-94. + +} @encoding (T1) { @word 1 1 1 0 1 1 1 0 opc1(4) CRn(4) CRd(4) coproc(4) opc2(3) 0 CRm(4) - @syntax <cp> <undef_opc1> <creg_D> <creg_N> <creg_M> <undef_opc2> + @syntax { - @conv { + @conv { - cp = CoProcessor(coproc) - undef_opc1 = RawValue(opc1) - creg_D = CRegister(CRd) - creg_N = CRegister(CRn) - creg_M = CRegister(CRm) - undef_opc2 = RawValue(opc2) + cp = CoProcessor(coproc) + direct_opc1 = UInt(opc1) + direct_CRd = UInt(CRd) + direct_CRn = UInt(CRn) + direct_CRm = UInt(CRm) + direct_opc2 = UInt(opc2) + + } + + @asm cdp cp direct_opc1 direct_CRd direct_CRn direct_CRm ?direct_opc2 } @@ -46,24 +56,22 @@ @encoding (A1) { - @word cond(4) 1 1 1 0 opc1(4) CRn(4) CRd(4) coproc(4) opc2(3) 0 CRm(4) - - @syntax <cp> <undef_opc1> <creg_D> <creg_N> <creg_M> <undef_opc2> + @word 1 1 1 0 1 1 1 0 opc1(4) CRn(4) CRd(4) coproc(4) opc2(3) 0 CRm(4) - @conv { + @syntax { - cp = CoProcessor(coproc) - undef_opc1 = RawValue(opc1) - creg_D = CRegister(CRd) - creg_N = CRegister(CRn) - creg_M = CRegister(CRm) - undef_opc2 = RawValue(opc2) + @conv { - } + cp = CoProcessor(coproc) + direct_opc1 = UInt(opc1) + direct_CRd = UInt(CRd) + direct_CRn = UInt(CRn) + direct_CRm = UInt(CRm) + direct_opc2 = UInt(opc2) - @rules { + } - chk_call StoreCondition(cond) + @asm cdp cp direct_opc1 direct_CRd direct_CRn direct_CRm ?direct_opc2 } @@ -73,16 +81,20 @@ @word 1 1 1 1 1 1 1 0 opc1(4) CRn(4) CRd(4) coproc(4) opc2(3) 0 CRm(4) - @syntax "cdp2" <cp> <undef_opc1> <creg_D> <creg_N> <creg_M> <undef_opc2> + @syntax { + + @conv { - @conv { + cp = CoProcessor(coproc) + direct_opc1 = UInt(opc1) + direct_CRd = UInt(CRd) + direct_CRn = UInt(CRn) + direct_CRm = UInt(CRm) + direct_opc2 = UInt(opc2) - cp = CoProcessor(coproc) - undef_opc1 = RawValue(opc1) - creg_D = CRegister(CRd) - creg_N = CRegister(CRn) - creg_M = CRegister(CRm) - undef_opc2 = RawValue(opc2) + } + + @asm cdp cp direct_opc1 direct_CRd direct_CRn direct_CRm ?direct_opc2 } @@ -92,16 +104,20 @@ @word 1 1 1 1 1 1 1 0 opc1(4) CRn(4) CRd(4) coproc(4) opc2(3) 0 CRm(4) - @syntax "cdp2" <cp> <undef_opc1> <creg_D> <creg_N> <creg_M> <undef_opc2> + @syntax { + + @conv { + + cp = CoProcessor(coproc) + direct_opc1 = UInt(opc1) + direct_CRd = UInt(CRd) + direct_CRn = UInt(CRn) + direct_CRm = UInt(CRm) + direct_opc2 = UInt(opc2) - @conv { + } - cp = CoProcessor(coproc) - undef_opc1 = RawValue(opc1) - creg_D = CRegister(CRd) - creg_N = CRegister(CRn) - creg_M = CRegister(CRm) - undef_opc2 = RawValue(opc2) + @asm cdp cp direct_opc1 direct_CRd direct_CRn direct_CRm ?direct_opc2 } |