diff options
Diffstat (limited to 'plugins/arm/v7/opdefs/ldrd_A8873.d')
| -rw-r--r-- | plugins/arm/v7/opdefs/ldrd_A8873.d | 44 |
1 files changed, 29 insertions, 15 deletions
diff --git a/plugins/arm/v7/opdefs/ldrd_A8873.d b/plugins/arm/v7/opdefs/ldrd_A8873.d index 828e4a3..fd64c78 100644 --- a/plugins/arm/v7/opdefs/ldrd_A8873.d +++ b/plugins/arm/v7/opdefs/ldrd_A8873.d @@ -2,7 +2,7 @@ /* Chrysalide - Outil d'analyse de fichiers binaires * ##FILE## - traduction d'instructions ARMv7 * - * Copyright (C) 2015 Cyrille Bagard + * Copyright (C) 2017 Cyrille Bagard * * This file is part of Chrysalide. * @@ -23,19 +23,29 @@ @title LDRD (literal) -@desc Load Register Dual (literal) calculates an address from the PC value and an immediate offset, loads two words from memory, and writes them to two registers. For information about memory accesses see Memory accesses on page A8-294. +@id 72 + +@desc { + + Load Register Dual (literal) calculates an address from the PC value and an immediate offset, loads two words from memory, and writes them to two registers. For information about memory accesses see Memory accesses on page A8-294. + +} @encoding (T1) { @word 1 1 1 0 1 0 0 P(1) U(1) 1 W(1) 1 1 1 1 1 Rt(4) Rt2(4) imm8(8) - @syntax <reg_T> <reg_T2> <imm32> + @syntax { + + @conv { - @conv { + reg_T = Register(Rt) + reg_T2 = Register(Rt2) + imm32 = ZeroExtend(imm8:'00', 32) - reg_T = Register(Rt) - reg_T2 = Register(Rt2) - imm32 = ZeroExtend(imm8:'00', 32) + } + + @asm ldrd reg_T reg_T2 imm32 } @@ -45,19 +55,23 @@ @word cond(4) 0 0 0 1 U(1) 1 0 0 1 1 1 1 Rt(4) imm4H(4) 1 1 0 1 imm4L(4) - @syntax <reg_T> <reg_T2> <imm32> + @syntax { - @conv { + @conv { - reg_T = Register(Rt) - reg_T2 = NextRegister(reg_T) - imm32 = ZeroExtend(imm4H:imm4L, 32) + reg_T = Register(Rt) + reg_T2 = NextRegister(Rt) + imm32 = ZeroExtend(imm4H:imm4L, 32) - } + } + + @asm ldrd reg_T reg_T2 imm32 + + @rules { - @rules { + check g_arm_instruction_set_cond(cond) - chk_call StoreCondition(cond) + } } |