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-rw-r--r--plugins/arm/v7/opdefs/ldrex_A8875.d47
1 files changed, 31 insertions, 16 deletions
diff --git a/plugins/arm/v7/opdefs/ldrex_A8875.d b/plugins/arm/v7/opdefs/ldrex_A8875.d
index b915061..b30ae86 100644
--- a/plugins/arm/v7/opdefs/ldrex_A8875.d
+++ b/plugins/arm/v7/opdefs/ldrex_A8875.d
@@ -2,7 +2,7 @@
/* Chrysalide - Outil d'analyse de fichiers binaires
* ##FILE## - traduction d'instructions ARMv7
*
- * Copyright (C) 2015 Cyrille Bagard
+ * Copyright (C) 2017 Cyrille Bagard
*
* This file is part of Chrysalide.
*
@@ -23,20 +23,30 @@
@title LDREX
-@desc Load Register Exclusive calculates an address from a base register value and an immediate offset, loads a word from memory, writes it to a register and: • if the address has the Shared Memory attribute, marks the physical address as exclusive access for the executing processor in a global monitor • causes the executing processor to indicate an active exclusive access in the local monitor. For more information about support for shared memory see Synchronization and semaphores on page A3-114. For information about memory accesses see Memory accesses on page A8-294.
+@id 74
+
+@desc {
+
+ Load Register Exclusive calculates an address from a base register value and an immediate offset, loads a word from memory, writes it to a register and: • if the address has the Shared Memory attribute, marks the physical address as exclusive access for the executing processor in a global monitor • causes the executing processor to indicate an active exclusive access in the local monitor. For more information about support for shared memory see Synchronization and semaphores on page A3-114. For information about memory accesses see Memory accesses on page A8-294.
+
+}
@encoding (T1) {
@word 1 1 1 0 1 0 0 0 0 1 0 1 Rn(4) Rt(4) 1 1 1 1 imm8(8)
- @syntax <reg_T> <mem_access>
+ @syntax {
+
+ @conv {
- @conv {
+ reg_T = Register(Rt)
+ reg_N = Register(Rn)
+ imm32 = ZeroExtend(imm8:'00', 32)
+ maccess = MemAccessOffset(reg_N, imm32)
- reg_T = Register(Rt)
- reg_N = Register(Rn)
- imm32 = ZeroExtend(imm8:'00', 32)
- mem_access = MakeMemoryAccess(reg_N, imm32, NULL, true, false, false)
+ }
+
+ @asm ldrex reg_T maccess
}
@@ -46,19 +56,24 @@
@word cond(4) 0 0 0 1 1 0 0 1 Rn(4) Rt(4) 1 1 1 1 1 0 0 1 1 1 1 1
- @syntax <reg_T> <mem_access>
+ @syntax {
- @conv {
+ @conv {
- reg_T = Register(Rt)
- reg_N = Register(Rn)
- mem_access = MakeMemoryAccess(reg_N, NULL, NULL, true, false, false)
+ reg_T = Register(Rt)
+ reg_N = Register(Rn)
+ imm32 = Zeros(32)
+ maccess = MemAccessOffset(reg_N, imm32)
- }
+ }
+
+ @asm ldrex reg_T maccess
+
+ @rules {
- @rules {
+ check g_arm_instruction_set_cond(cond)
- chk_call StoreCondition(cond)
+ }
}