summaryrefslogtreecommitdiff
path: root/plugins/arm/v7/opdefs/ldrexb_A8876.d
diff options
context:
space:
mode:
Diffstat (limited to 'plugins/arm/v7/opdefs/ldrexb_A8876.d')
-rw-r--r--plugins/arm/v7/opdefs/ldrexb_A8876.d44
1 files changed, 29 insertions, 15 deletions
diff --git a/plugins/arm/v7/opdefs/ldrexb_A8876.d b/plugins/arm/v7/opdefs/ldrexb_A8876.d
index e398ef2..8827994 100644
--- a/plugins/arm/v7/opdefs/ldrexb_A8876.d
+++ b/plugins/arm/v7/opdefs/ldrexb_A8876.d
@@ -2,7 +2,7 @@
/* Chrysalide - Outil d'analyse de fichiers binaires
* ##FILE## - traduction d'instructions ARMv7
*
- * Copyright (C) 2015 Cyrille Bagard
+ * Copyright (C) 2017 Cyrille Bagard
*
* This file is part of Chrysalide.
*
@@ -23,19 +23,29 @@
@title LDREXB
-@desc Load Register Exclusive Byte derives an address from a base register value, loads a byte from memory, zero-extends it to form a 32-bit word, writes it to a register and: • if the address has the Shared Memory attribute, marks the physical address as exclusive access for the executing processor in a global monitor • causes the executing processor to indicate an active exclusive access in the local monitor. For more information about support for shared memory see Synchronization and semaphores on page A3-114. For information about memory accesses see Memory accesses on page A8-294.
+@id 75
+
+@desc {
+
+ Load Register Exclusive Byte derives an address from a base register value, loads a byte from memory, zero-extends it to form a 32-bit word, writes it to a register and: • if the address has the Shared Memory attribute, marks the physical address as exclusive access for the executing processor in a global monitor • causes the executing processor to indicate an active exclusive access in the local monitor. For more information about support for shared memory see Synchronization and semaphores on page A3-114. For information about memory accesses see Memory accesses on page A8-294.
+
+}
@encoding (T1) {
@word 1 1 1 0 1 0 0 0 1 1 0 1 Rn(4) Rt(4) 1 1 1 1 0 1 0 0 1 1 1 1
- @syntax <reg_T> <mem_access>
+ @syntax {
+
+ @conv {
- @conv {
+ reg_T = Register(Rt)
+ reg_N = Register(Rn)
+ maccess = MemAccessOffset(reg_N, NULL)
- reg_T = Register(Rt)
- reg_N = Register(Rn)
- mem_access = MakeMemoryAccess(reg_N, NULL, NULL, true, false, false)
+ }
+
+ @asm ldrexb reg_T maccess
}
@@ -45,19 +55,23 @@
@word cond(4) 0 0 0 1 1 1 0 1 Rn(4) Rt(4) 1 1 1 1 1 0 0 1 1 1 1 1
- @syntax <reg_T> <mem_access>
+ @syntax {
- @conv {
+ @conv {
- reg_T = Register(Rt)
- reg_N = Register(Rn)
- mem_access = MakeMemoryAccess(reg_N, NULL, NULL, true, false, false)
+ reg_T = Register(Rt)
+ reg_N = Register(Rn)
+ maccess = MemAccessOffset(reg_N, NULL)
- }
+ }
+
+ @asm ldrexb reg_T maccess
+
+ @rules {
- @rules {
+ check g_arm_instruction_set_cond(cond)
- chk_call StoreCondition(cond)
+ }
}