diff options
Diffstat (limited to 'plugins/arm/v7/opdefs/ldrexd_A8877.d')
| -rw-r--r-- | plugins/arm/v7/opdefs/ldrexd_A8877.d | 48 |
1 files changed, 31 insertions, 17 deletions
diff --git a/plugins/arm/v7/opdefs/ldrexd_A8877.d b/plugins/arm/v7/opdefs/ldrexd_A8877.d index 0188cb7..16f6ea6 100644 --- a/plugins/arm/v7/opdefs/ldrexd_A8877.d +++ b/plugins/arm/v7/opdefs/ldrexd_A8877.d @@ -2,7 +2,7 @@ /* Chrysalide - Outil d'analyse de fichiers binaires * ##FILE## - traduction d'instructions ARMv7 * - * Copyright (C) 2015 Cyrille Bagard + * Copyright (C) 2017 Cyrille Bagard * * This file is part of Chrysalide. * @@ -23,20 +23,30 @@ @title LDREXD -@desc Load Register Exclusive Doubleword derives an address from a base register value, loads a 64-bit doubleword from memory, writes it to two registers and: • if the address has the Shared Memory attribute, marks the physical address as exclusive access for the executing processor in a global monitor • causes the executing processor to indicate an active exclusive access in the local monitor. For more information about support for shared memory see Synchronization and semaphores on page A3-114. For information about memory accesses see Memory accesses on page A8-294. +@id 76 + +@desc { + + Load Register Exclusive Doubleword derives an address from a base register value, loads a 64-bit doubleword from memory, writes it to two registers and: • if the address has the Shared Memory attribute, marks the physical address as exclusive access for the executing processor in a global monitor • causes the executing processor to indicate an active exclusive access in the local monitor. For more information about support for shared memory see Synchronization and semaphores on page A3-114. For information about memory accesses see Memory accesses on page A8-294. + +} @encoding (T1) { @word 1 1 1 0 1 0 0 0 1 1 0 1 Rn(4) Rt(4) Rt2(4) 0 1 1 1 1 1 1 1 - @syntax <reg_T> <reg_T2> <mem_access> + @syntax { + + @conv { - @conv { + reg_T = Register(Rt) + reg_T2 = Register(Rt2) + reg_N = Register(Rn) + maccess = MemAccessOffset(reg_N, NULL) - reg_T = Register(Rt) - reg_T2 = Register(Rt2) - reg_N = Register(Rn) - mem_access = MakeMemoryAccess(reg_N, NULL, NULL, true, false, false) + } + + @asm ldrexd reg_T reg_T2 maccess } @@ -46,20 +56,24 @@ @word cond(4) 0 0 0 1 1 0 1 1 Rn(4) Rt(4) 1 1 1 1 1 0 0 1 1 1 1 1 - @syntax <reg_T> <reg_T2> <mem_access> + @syntax { - @conv { + @conv { - reg_T = Register(Rt) - reg_T2 = NextRegister(reg_T) - reg_N = Register(Rn) - mem_access = MakeMemoryAccess(reg_N, NULL, NULL, true, false, false) + reg_T = Register(Rt) + reg_T2 = NextRegister(Rt) + reg_N = Register(Rn) + maccess = MemAccessOffset(reg_N, NULL) - } + } + + @asm ldrexd reg_T reg_T2 maccess + + @rules { - @rules { + check g_arm_instruction_set_cond(cond) - chk_call StoreCondition(cond) + } } |