diff options
Diffstat (limited to 'plugins/arm/v7/opdefs/ldrsb_A8884.d')
| -rw-r--r-- | plugins/arm/v7/opdefs/ldrsb_A8884.d | 182 |
1 files changed, 154 insertions, 28 deletions
diff --git a/plugins/arm/v7/opdefs/ldrsb_A8884.d b/plugins/arm/v7/opdefs/ldrsb_A8884.d index fc41134..05a0372 100644 --- a/plugins/arm/v7/opdefs/ldrsb_A8884.d +++ b/plugins/arm/v7/opdefs/ldrsb_A8884.d @@ -2,7 +2,7 @@ /* Chrysalide - Outil d'analyse de fichiers binaires * ##FILE## - traduction d'instructions ARMv7 * - * Copyright (C) 2015 Cyrille Bagard + * Copyright (C) 2017 Cyrille Bagard * * This file is part of Chrysalide. * @@ -23,20 +23,30 @@ @title LDRSB (immediate) -@desc Load Register Signed Byte (immediate) calculates an address from a base register value and an immediate offset, loads a byte from memory, sign-extends it to form a 32-bit word, and writes it to a register. It can use offset, post-indexed, or pre-indexed addressing. For information about memory accesses see Memory accesses on page A8-294. +@id 83 + +@desc { + + Load Register Signed Byte (immediate) calculates an address from a base register value and an immediate offset, loads a byte from memory, sign-extends it to form a 32-bit word, and writes it to a register. It can use offset, post-indexed, or pre-indexed addressing. For information about memory accesses see Memory accesses on page A8-294. + +} @encoding (T1) { @word 1 1 1 1 1 0 0 1 1 0 0 1 Rn(4) Rt(4) imm12(12) - @syntax <reg_T> <mem_access> + @syntax { - @conv { + @conv { - reg_T = Register(Rt) - reg_N = Register(Rn) - imm32 = ZeroExtend(imm12, 32) - mem_access = MakeMemoryAccess(reg_N, imm32, NULL, true, true, false) + reg_T = Register(Rt) + reg_N = Register(Rn) + imm32 = ZeroExtend(imm12, 32) + maccess = MemAccessOffset(reg_N, imm32) + + } + + @asm ldrsb reg_T maccess } @@ -46,17 +56,69 @@ @word 1 1 1 1 1 0 0 1 0 0 0 1 Rn(4) Rt(4) 1 P(1) U(1) W(1) imm8(8) - @syntax <reg_T> <mem_access> + @syntax { + + @assert { + + P == 1 + W == 0 + + } + + @conv { + + reg_T = Register(Rt) + reg_N = Register(Rn) + imm32 = ZeroExtend(imm8, 32) + maccess = MemAccessOffset(reg_N, imm32) + + } + + @asm ldrsb reg_T maccess + + } + + @syntax { + + @assert { + + P == 1 + W == 1 + + } + + @conv { + + reg_T = Register(Rt) + reg_N = Register(Rn) + imm32 = ZeroExtend(imm8, 32) + maccess = MemAccessPreIndexed(reg_N, imm32) + + } + + @asm ldrsb reg_T maccess + + } + + @syntax { + + @assert { + + P == 0 + W == 1 + + } + + @conv { + + reg_T = Register(Rt) + reg_N = Register(Rn) + imm32 = ZeroExtend(imm8, 32) + maccess = MemAccessPostIndexed(reg_N, imm32) - @conv { + } - reg_T = Register(Rt) - reg_N = Register(Rn) - imm32 = ZeroExtend(imm8, 32) - index = (P == '1') - add = (U == '1') - wback = (W == '1') - mem_access = MakeMemoryAccess(reg_N, imm32, NULL, index, add, wback) + @asm ldrsb reg_T maccess } @@ -66,23 +128,87 @@ @word cond(4) 0 0 0 P(1) U(1) 1 W(1) 1 Rn(4) Rt(4) imm4H(4) 1 1 0 1 imm4L(4) - @syntax <reg_T> <mem_access> + @syntax { - @conv { + @assert { - reg_T = Register(Rt) - reg_N = Register(Rn) - imm32 = ZeroExtend(imm4H:imm4L, 32) - index = (P == '1') - add = (U == '1') - wback = (P == '0') || (W == '1') - mem_access = MakeMemoryAccess(reg_N, imm32, NULL, index, add, wback) + P == 1 + P == 1 && W == 0 + + } + + @conv { + + reg_T = Register(Rt) + reg_N = Register(Rn) + imm32 = ZeroExtend(imm4H:imm4L, 32) + maccess = MemAccessOffset(reg_N, imm32) + + } + + @asm ldrsb reg_T maccess + + @rules { + + check g_arm_instruction_set_cond(cond) + + } + + } + + @syntax { + + @assert { + + P == 1 + P == 0 || W == 1 + + } + + @conv { + + reg_T = Register(Rt) + reg_N = Register(Rn) + imm32 = ZeroExtend(imm4H:imm4L, 32) + maccess = MemAccessPreIndexed(reg_N, imm32) + + } + + @asm ldrsb reg_T maccess + + @rules { + + check g_arm_instruction_set_cond(cond) + + } } - @rules { + @syntax { + + @assert { + + P == 0 + P == 0 || W == 1 + + } + + @conv { + + reg_T = Register(Rt) + reg_N = Register(Rn) + imm32 = ZeroExtend(imm4H:imm4L, 32) + maccess = MemAccessPostIndexed(reg_N, imm32) + + } + + @asm ldrsb reg_T maccess + + @rules { + + check g_arm_instruction_set_cond(cond) - chk_call StoreCondition(cond) + } } |