diff options
Diffstat (limited to 'plugins/arm/v7/opdefs/mls_A88101.d')
| -rw-r--r-- | plugins/arm/v7/opdefs/mls_A88101.d | 48 |
1 files changed, 31 insertions, 17 deletions
diff --git a/plugins/arm/v7/opdefs/mls_A88101.d b/plugins/arm/v7/opdefs/mls_A88101.d index 4d10be8..bdb9073 100644 --- a/plugins/arm/v7/opdefs/mls_A88101.d +++ b/plugins/arm/v7/opdefs/mls_A88101.d @@ -2,7 +2,7 @@ /* Chrysalide - Outil d'analyse de fichiers binaires * ##FILE## - traduction d'instructions ARMv7 * - * Copyright (C) 2015 Cyrille Bagard + * Copyright (C) 2017 Cyrille Bagard * * This file is part of Chrysalide. * @@ -23,20 +23,30 @@ @title MLS -@desc Multiply and Subtract multiplies two register values, and subtracts the product from a third register value. The least significant 32 bits of the result are written to the destination register. These 32 bits do not depend on whether the source register values are considered to be signed values or unsigned values. +@id 100 + +@desc { + + Multiply and Subtract multiplies two register values, and subtracts the product from a third register value. The least significant 32 bits of the result are written to the destination register. These 32 bits do not depend on whether the source register values are considered to be signed values or unsigned values. + +} @encoding (T1) { @word 1 1 1 1 1 0 1 1 0 0 0 0 Rn(4) Ra(4) Rd(4) 0 0 0 1 Rm(4) - @syntax <reg_D> <reg_N> <reg_M> <reg_A> + @syntax { + + @conv { - @conv { + reg_D = Register(Rd) + reg_N = Register(Rn) + reg_M = Register(Rm) + reg_A = Register(Ra) - reg_D = Register(Rd) - reg_N = Register(Rn) - reg_M = Register(Rm) - reg_A = Register(Ra) + } + + @asm mls reg_D reg_N reg_M reg_A } @@ -46,20 +56,24 @@ @word cond(4) 0 0 0 0 0 1 1 0 Rd(4) Ra(4) Rm(4) 1 0 0 1 Rn(4) - @syntax <reg_D> <reg_N> <reg_M> <reg_A> + @syntax { - @conv { + @conv { - reg_D = Register(Rd) - reg_N = Register(Rn) - reg_M = Register(Rm) - reg_A = Register(Ra) + reg_D = Register(Rd) + reg_N = Register(Rn) + reg_M = Register(Rm) + reg_A = Register(Ra) - } + } + + @asm mls reg_D reg_N reg_M reg_A + + @rules { - @rules { + check g_arm_instruction_set_cond(cond) - chk_call StoreCondition(cond) + } } |