1 files changed, 27 insertions, 5 deletions
diff --git a/plugins/arm/v7/opdefs/nop_A88119.d b/plugins/arm/v7/opdefs/nop_A88119.d
index 84c495a..1f9b82f 100644
--- a/plugins/arm/v7/opdefs/nop_A88119.d
+++ b/plugins/arm/v7/opdefs/nop_A88119.d
@@ -2,7 +2,7 @@
 /* Chrysalide - Outil d'analyse de fichiers binaires
  * ##FILE## - traduction d'instructions ARMv7
  *
- * Copyright (C) 2015 Cyrille Bagard
+ * Copyright (C) 2017 Cyrille Bagard
  *
  *  This file is part of Chrysalide.
  *
@@ -23,19 +23,35 @@
 
 @title NOP
 
-@desc No Operation does nothing. This instruction can be used for instruction alignment purposes. See Pre-UAL pseudo-instruction NOP on page AppxH-2472 for details of NOP before the introduction of UAL and the ARMv6K and ARMv6T2 architecture variants. Note The timing effects of including a NOP instruction in a program are not guaranteed. It can increase execution time, leave it unchanged, or even reduce it. Therefore, NOP instructions are not suitable for timing loops.
+@id 118
+
+@desc {
+
+	No Operation does nothing. This instruction can be used for instruction alignment purposes. See Pre-UAL pseudo-instruction NOP on page AppxH-2472 for details of NOP before the introduction of UAL and the ARMv6K and ARMv6T2 architecture variants. Note The timing effects of including a NOP instruction in a program are not guaranteed. It can increase execution time, leave it unchanged, or even reduce it. Therefore, NOP instructions are not suitable for timing loops.
+
+}
 
 @encoding (t1) {
 
 	@half 1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0
 
+	@syntax {
+
+		@asm nop
+
+	}
+
 }
 
 @encoding (T2) {
 
 	@word 1 1 1 1 0 0 1 1 1 0 1 0 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
 
-	@syntax ".W"
+	@syntax {
+
+		@asm nop.w
+
+	}
 
 }
 
@@ -43,9 +59,15 @@
 
 	@word cond(4) 0 0 1 1 0 0 1 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
 
-	@rules {
+	@syntax {
+
+		@asm nop
+
+		@rules {
+
+			check g_arm_instruction_set_cond(cond)
 
-		chk_call StoreCondition(cond)
+		}
 
 	}