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-rw-r--r--plugins/arm/v7/opdefs/sbc_A88161.d101
1 files changed, 82 insertions, 19 deletions
diff --git a/plugins/arm/v7/opdefs/sbc_A88161.d b/plugins/arm/v7/opdefs/sbc_A88161.d
index 4ea776a..d085e28 100644
--- a/plugins/arm/v7/opdefs/sbc_A88161.d
+++ b/plugins/arm/v7/opdefs/sbc_A88161.d
@@ -2,7 +2,7 @@
/* Chrysalide - Outil d'analyse de fichiers binaires
* ##FILE## - traduction d'instructions ARMv7
*
- * Copyright (C) 2015 Cyrille Bagard
+ * Copyright (C) 2017 Cyrille Bagard
*
* This file is part of Chrysalide.
*
@@ -23,26 +23,55 @@
@title SBC (immediate)
-@desc Subtract with Carry (immediate) subtracts an immediate value and the value of NOT (Carry flag) from a register value, and writes the result to the destination register. It can optionally update the condition flags based on the result.
+@id 160
+
+@desc {
+
+ Subtract with Carry (immediate) subtracts an immediate value and the value of NOT (Carry flag) from a register value, and writes the result to the destination register. It can optionally update the condition flags based on the result.
+
+}
@encoding (T1) {
@word 1 1 1 1 0 i(1) 0 1 0 1 1 S(1) Rn(4) 0 imm3(3) Rd(4) imm8(8)
- @syntax <reg_D> <reg_N> <imm32>
+ @syntax {
+
+ @assert {
+
+ S == 0
+
+ }
+
+ @conv {
- @conv {
+ reg_D = Register(Rd)
+ reg_N = Register(Rn)
+ imm32 = ThumbExpandImm(i:imm3:imm8)
- reg_D = Register(Rd)
- reg_N = Register(Rn)
- setflags = (S == '1')
- imm32 = ThumbExpandImm(i:imm3:imm8)
+ }
+
+ @asm sbc ?reg_D reg_N imm32
}
- @rules {
+ @syntax {
+
+ @assert {
+
+ S == 1
+
+ }
- if (setflags); chk_call ExtendKeyword("s")
+ @conv {
+
+ reg_D = Register(Rd)
+ reg_N = Register(Rn)
+ imm32 = ThumbExpandImm(i:imm3:imm8)
+
+ }
+
+ @asm sbcs ?reg_D reg_N imm32
}
@@ -52,21 +81,55 @@
@word cond(4) 0 0 1 0 1 1 0 S(1) Rn(4) Rd(4) imm12(12)
- @syntax <reg_D> <reg_N> <imm32>
+ @syntax {
+
+ @assert {
- @conv {
+ S == 0
- reg_D = Register(Rd)
- reg_N = Register(Rn)
- setflags = (S == '1')
- imm32 = ARMExpandImm(imm12)
+ }
+
+ @conv {
+
+ reg_D = Register(Rd)
+ reg_N = Register(Rn)
+ imm32 = ARMExpandImm(imm12)
+
+ }
+
+ @asm sbc ?reg_D reg_N imm32
+
+ @rules {
+
+ check g_arm_instruction_set_cond(cond)
+
+ }
}
- @rules {
+ @syntax {
+
+ @assert {
+
+ S == 1
+
+ }
+
+ @conv {
+
+ reg_D = Register(Rd)
+ reg_N = Register(Rn)
+ imm32 = ARMExpandImm(imm12)
+
+ }
+
+ @asm sbcs ?reg_D reg_N imm32
+
+ @rules {
+
+ check g_arm_instruction_set_cond(cond)
- if (setflags); chk_call ExtendKeyword("s")
- chk_call StoreCondition(cond)
+ }
}