diff options
Diffstat (limited to 'plugins/arm/v7/opdefs/strexd_A88214.d')
| -rw-r--r-- | plugins/arm/v7/opdefs/strexd_A88214.d | 52 |
1 files changed, 33 insertions, 19 deletions
diff --git a/plugins/arm/v7/opdefs/strexd_A88214.d b/plugins/arm/v7/opdefs/strexd_A88214.d index 2867cea..3da8f64 100644 --- a/plugins/arm/v7/opdefs/strexd_A88214.d +++ b/plugins/arm/v7/opdefs/strexd_A88214.d @@ -2,7 +2,7 @@ /* Chrysalide - Outil d'analyse de fichiers binaires * ##FILE## - traduction d'instructions ARMv7 * - * Copyright (C) 2015 Cyrille Bagard + * Copyright (C) 2017 Cyrille Bagard * * This file is part of Chrysalide. * @@ -23,21 +23,31 @@ @title STREXD -@desc Store Register Exclusive Doubleword derives an address from a base register value, and stores a 64-bit doubleword from two registers to memory if the executing processor has exclusive access to the memory addressed. For more information about support for shared memory see Synchronization and semaphores on page A3-114. For information about memory accesses see Memory accesses on page A8-294. +@id 213 + +@desc { + + Store Register Exclusive Doubleword derives an address from a base register value, and stores a 64-bit doubleword from two registers to memory if the executing processor has exclusive access to the memory addressed. For more information about support for shared memory see Synchronization and semaphores on page A3-114. For information about memory accesses see Memory accesses on page A8-294. + +} @encoding (T1) { @word 1 1 1 0 1 0 0 0 1 1 0 0 Rn(4) Rt(4) Rt2(4) 0 1 1 1 Rd(4) - @syntax <reg_D> <reg_T> <reg_T2> <mem_access> + @syntax { + + @conv { - @conv { + reg_D = Register(Rd) + reg_T = Register(Rt) + reg_T2 = Register(Rt2) + reg_N = Register(Rn) + maccess = MemAccessOffset(reg_N, NULL) - reg_D = Register(Rd) - reg_T = Register(Rt) - reg_T2 = Register(Rt2) - reg_N = Register(Rn) - mem_access = MakeMemoryAccess(reg_N, NULL, NULL, true, false, false) + } + + @asm strexd reg_D reg_T reg_T2 maccess } @@ -47,21 +57,25 @@ @word cond(4) 0 0 0 1 1 0 1 0 Rn(4) Rd(4) 1 1 1 1 1 0 0 1 Rt(4) - @syntax <reg_D> <reg_T> <reg_T2> <mem_access> + @syntax { - @conv { + @conv { - reg_D = Register(Rd) - reg_T = Register(Rt) - reg_T2 = NextRegister(reg_T) - reg_N = Register(Rn) - mem_access = MakeMemoryAccess(reg_N, NULL, NULL, true, false, false) + reg_D = Register(Rd) + reg_T = Register(Rt) + reg_T2 = NextRegister(Rt) + reg_N = Register(Rn) + maccess = MemAccessOffset(reg_N, NULL) - } + } + + @asm strexd reg_D reg_T reg_T2 maccess + + @rules { - @rules { + check g_arm_instruction_set_cond(cond) - chk_call StoreCondition(cond) + } } |