diff options
Diffstat (limited to 'plugins/arm/v7/opdefs/udf_A88247.d')
| -rw-r--r-- | plugins/arm/v7/opdefs/udf_A88247.d | 40 |
1 files changed, 29 insertions, 11 deletions
diff --git a/plugins/arm/v7/opdefs/udf_A88247.d b/plugins/arm/v7/opdefs/udf_A88247.d index 38f818c..db8fc28 100644 --- a/plugins/arm/v7/opdefs/udf_A88247.d +++ b/plugins/arm/v7/opdefs/udf_A88247.d @@ -2,7 +2,7 @@ /* Chrysalide - Outil d'analyse de fichiers binaires * ##FILE## - traduction d'instructions ARMv7 * - * Copyright (C) 2015 Cyrille Bagard + * Copyright (C) 2017 Cyrille Bagard * * This file is part of Chrysalide. * @@ -23,17 +23,27 @@ @title UDF -@desc Permanently Undefined generates an Undefined Instruction exception. The encodings for UDF used in this section are defined as permanently UNDEFINED in the versions of the architecture specified in this section. Issue C.a of this manual first defines an assembler mnemonic for these encodings. However: • with the Thumb instruction set, ARM deprecates using the UDF instruction in an IT block • in the ARM instruction set, UDF is not conditional. +@id 246 + +@desc { + + Permanently Undefined generates an Undefined Instruction exception. The encodings for UDF used in this section are defined as permanently UNDEFINED in the versions of the architecture specified in this section. Issue C.a of this manual first defines an assembler mnemonic for these encodings. However: • with the Thumb instruction set, ARM deprecates using the UDF instruction in an IT block • in the ARM instruction set, UDF is not conditional. + +} @encoding (t1) { @half 1 1 0 1 1 1 1 0 imm8(8) - @syntax <imm32> + @syntax { + + @conv { - @conv { + imm32 = ZeroExtend(imm8, 32) - imm32 = ZeroExtend(imm8, 32) + } + + @asm udf imm32 } @@ -43,11 +53,15 @@ @word 1 1 1 1 0 1 1 1 1 1 1 1 imm4(4) 1 0 1 0 imm12(12) - @syntax ".W" <imm32> + @syntax { + + @conv { + + imm32 = ZeroExtend(imm4:imm12, 32) - @conv { + } - imm32 = ZeroExtend(imm4:imm12, 32) + @asm udf.w imm32 } @@ -57,11 +71,15 @@ @word 1 1 1 0 0 1 1 1 1 1 1 1 imm12(12) 1 1 1 1 imm4(4) - @syntax <imm32> + @syntax { + + @conv { + + imm32 = ZeroExtend(imm12:imm4, 32) - @conv { + } - imm32 = ZeroExtend(imm12:imm4, 32) + @asm udf imm32 } |