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-rw-r--r--src/arch/arm/v7/opdefs/Makefile.am4
-rw-r--r--src/arch/arm/v7/opdefs/ldr_A8862.d137
-rw-r--r--src/arch/arm/v7/opdefs/ldr_A8864.d78
-rw-r--r--src/arch/arm/v7/opdefs/mov_A88102.d2
-rw-r--r--src/arch/arm/v7/opdefs/mov_A88103.d90
-rw-r--r--src/arch/arm/v7/opdefs/str_A88203.d135
6 files changed, 445 insertions, 1 deletions
diff --git a/src/arch/arm/v7/opdefs/Makefile.am b/src/arch/arm/v7/opdefs/Makefile.am
index ff9f4a5..348cbf6 100644
--- a/src/arch/arm/v7/opdefs/Makefile.am
+++ b/src/arch/arm/v7/opdefs/Makefile.am
@@ -38,9 +38,12 @@ ARMV7_DEFS = \
cmp_A8838.d \
eor_A8846.d \
eor_A8847.d \
+ ldr_A8862.d \
+ ldr_A8864.d \
mla_A88100.d \
mls_A88101.d \
mov_A88102.d \
+ mov_A88103.d \
mov_A88104.d \
mul_A88114.d \
mvn_A88115.d \
@@ -55,6 +58,7 @@ ARMV7_DEFS = \
sbc_A88162.d \
smlal_A88178.d \
smull_A88189.d \
+ str_A88203.d \
sub_A88222.d \
sub_A88223.d \
teq_A88237.d \
diff --git a/src/arch/arm/v7/opdefs/ldr_A8862.d b/src/arch/arm/v7/opdefs/ldr_A8862.d
new file mode 100644
index 0000000..7799fce
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/ldr_A8862.d
@@ -0,0 +1,137 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * Chrysalide is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chrysalide is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title LDR (immediate, Thumb)
+
+@encoding(t1) {
+
+ @half 0 1 1 0 1 imm5(5) Rn(3) Rt(3)
+
+ @syntax <Rgt> <access>
+
+ @conv {
+
+ Rgt = Register(Rt)
+ Rgn = Register(Rn)
+ imm32 = ZeroExtend(imm5:'00', 7, 32);
+ access = MakeMemoryAccess(Rgn, imm32, 1, 0)
+
+ }
+
+}
+
+@encoding(t2) {
+
+ @half 1 0 0 1 1 Rt(3) imm8(8)
+
+ @syntax <Rgt> <access>
+
+ @conv {
+
+ Rgt = Register(Rt)
+ Sp = Register(13)
+ imm32 = ZeroExtend(imm8:'00', 10, 32);
+ access = MakeMemoryAccess(Sp, imm32, 1, 0)
+
+ }
+
+}
+
+@encoding(T3) {
+
+ @word 1 1 1 1 1 0 0 0 1 1 0 1 Rn(4) Rt(4) imm12(12)
+
+ @syntax "ldr.W" <Rgt> <access>
+
+ @conv {
+
+ Rgt = Register(Rt)
+ Rgn = Register(Rn)
+ imm32 = ZeroExtend(imm12, 12, 32);
+ access = MakeMemoryAccess(Rgn, imm32, 1, 0)
+
+ }
+
+ @rules {
+
+ //if Rn == '1111' then SEE LDR (literal);
+ //if t == 15 && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
+
+ }
+
+}
+
+@encoding(T41) {
+
+ @word 1 1 1 1 1 0 0 0 0 1 0 1 Rn(4) Rt(4) 1 1 U(1) W(1) imm8(8)
+
+ @syntax <Rgt> <access>
+
+ @conv {
+
+ Rgt = Register(Rt)
+ Rgn = Register(Rn)
+ imm32 = ZeroExtend(imm8, 8, 32);
+ access = MakeMemoryAccess(Rgn, imm32, U, W)
+
+ }
+
+ @rules {
+
+ //if Rn == '1111' then SEE LDR (literal);
+ //if P == '1' && U == '1' && W == '0' then SEE LDRT;
+ //if Rn == '1101' && P == '0' && U == '1' && W == '1' && imm8 == '00000100' then SEE POP;
+ //if P == '0' && W == '0' then UNDEFINED;
+ //if (wback && n == t) || (t == 15 && InITBlock() && !LastInITBlock()) then UNPREDICTABLE;
+
+ }
+
+}
+
+@encoding(T42) {
+
+ @word 1 1 1 1 1 0 0 0 0 1 0 1 Rn(4) Rt(4) 1 0 U(1) W(1) imm8(8)
+
+ @syntax <Rgt> <base> <offset>
+
+ @conv {
+
+ Rgt = Register(Rt)
+ Rgn = Register(Rn)
+ imm32 = ZeroExtend(imm8, 8, 32);
+ base = MakeMemoryNotIndexed(Rgn, W)
+ offset = MakeAccessOffset(U, imm32)
+
+ }
+
+ @rules {
+
+ //if Rn == '1111' then SEE LDR (literal);
+ //if P == '1' && U == '1' && W == '0' then SEE LDRT;
+ //if Rn == '1101' && P == '0' && U == '1' && W == '1' && imm8 == '00000100' then SEE POP;
+ //if P == '0' && W == '0' then UNDEFINED;
+ //if (wback && n == t) || (t == 15 && InITBlock() && !LastInITBlock()) then UNPREDICTABLE;
+
+ }
+
+}
diff --git a/src/arch/arm/v7/opdefs/ldr_A8864.d b/src/arch/arm/v7/opdefs/ldr_A8864.d
new file mode 100644
index 0000000..acb6f94
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/ldr_A8864.d
@@ -0,0 +1,78 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * Chrysalide is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chrysalide is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title LDR (literal)
+
+@encoding(t1) {
+
+ @half 0 1 0 0 1 Rt(3) imm8(8)
+
+ @syntax <Rgt> <label>
+
+ @conv {
+
+ Rgt = Register(Rt)
+ imm32 = ZeroExtend(imm8:'00', 10, 32)
+ label = MakeAccessOffset(1, imm32)
+
+ }
+
+}
+
+@encoding(T2) {
+
+ @word 1 1 1 1 1 0 0 0 U(1) 1 0 1 1 1 1 1 Rt(4) imm12(12)
+
+ @syntax <Rgt> <label>
+
+ @conv {
+
+ Rgt = Register(Rt)
+ imm32 = ZeroExtend(imm12, 12, 32)
+ label = MakeAccessOffset(U, imm32)
+
+ }
+
+ @rules {
+
+ //if t == 15 && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
+
+ }
+
+}
+
+@encoding(A1) {
+
+ @word cond(4) 0 1 0 1 U(1) 0 0 1 1 1 1 1 Rt(4) imm12(12)
+
+ @syntax <Rgt> <label>
+
+ @conv {
+
+ Rgt = Register(Rt)
+ imm32 = ZeroExtend(imm12, 12, 32)
+ label = MakeAccessOffset(U, imm32)
+
+ }
+
+}
diff --git a/src/arch/arm/v7/opdefs/mov_A88102.d b/src/arch/arm/v7/opdefs/mov_A88102.d
index a71969f..ae67b22 100644
--- a/src/arch/arm/v7/opdefs/mov_A88102.d
+++ b/src/arch/arm/v7/opdefs/mov_A88102.d
@@ -108,7 +108,7 @@
@word cond(4) 0 0 1 1 0 0 0 0 imm4(4) Rd(4) imm12(12)
- @syntax {c} <Rd> <const>
+ @syntax "movw" {c} <Rd> <const>
@conv {
diff --git a/src/arch/arm/v7/opdefs/mov_A88103.d b/src/arch/arm/v7/opdefs/mov_A88103.d
new file mode 100644
index 0000000..d1f9b9c
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/mov_A88103.d
@@ -0,0 +1,90 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * Chrysalide is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chrysalide is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title MOV (register, Thumb)
+
+@encoding(t1) {
+
+ @half 0 1 0 0 0 1 1 0 D(1) Rm(4) Rd(3)
+
+ @syntax <Rgd> <Rgm>
+
+ @conv {
+
+ Rgd = Register(D:Rd)
+ Rgm = Register(Rm)
+
+ }
+
+ @rules {
+
+ //if d == 15 && InITBlock() && !LastInITBlock() then UNPREDICTABLE;
+
+ }
+
+}
+
+@encoding(t2) {
+
+ @half 0 0 0 0 0 0 0 0 0 0 Rm(3) Rd(3)
+
+ @syntax <Rgd> <Rgm>
+
+ @conv {
+
+ S = SetFlags(1)
+ Rgd = Register(Rd)
+ Rgm = Register(Rm)
+
+ }
+
+ @rules {
+
+ //if InITBlock() then UNPREDICTABLE;
+
+ }
+
+}
+
+@encoding(T3) {
+
+ @word 1 1 1 0 1 0 1 0 0 1 0 S(1) 1 1 1 1 0 0 0 0 Rd(4) 0 0 0 0 Rm(4)
+
+ @syntax {S} <Rgd> <Rgm>
+
+ @conv {
+
+ S = SetFlags(S)
+ Rgd = Register(Rd)
+ Rgm = Register(Rm)
+
+ }
+
+ @rules {
+
+ //if setflags && (d IN {13,15} || m IN {13,15}) then UNPREDICTABLE;
+ //if !setflags && (d == 15 || m == 15 || (d == 13 && m == 13)) then UNPREDICTABLE;
+
+ }
+
+}
diff --git a/src/arch/arm/v7/opdefs/str_A88203.d b/src/arch/arm/v7/opdefs/str_A88203.d
new file mode 100644
index 0000000..2952e1a
--- /dev/null
+++ b/src/arch/arm/v7/opdefs/str_A88203.d
@@ -0,0 +1,135 @@
+
+/* Chrysalide - Outil d'analyse de fichiers binaires
+ * ##FILE## - traduction d'instructions ARMv7
+ *
+ * Copyright (C) 2014 Cyrille Bagard
+ *
+ * This file is part of Chrysalide.
+ *
+ * Chrysalide is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chrysalide is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Foobar. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+@title STR (immediate, Thumb)
+
+@encoding(t1) {
+
+ @half 0 1 1 0 0 imm5(5) Rn(3) Rt(3)
+
+ @syntax <Rgt> <access>
+
+ @conv {
+
+ Rgt = Register(Rt)
+ Rgn = Register(Rn)
+ imm32 = ZeroExtend(imm5:'00', 7, 32);
+ access = MakeMemoryAccess(Rgn, imm32, 1, 0)
+
+ }
+
+}
+
+@encoding(t2) {
+
+ @half 1 0 0 1 0 Rt(3) imm8(8)
+
+ @syntax <Rgt> <access>
+
+ @conv {
+
+ Rgt = Register(Rt)
+ Sp = Register(13)
+ imm32 = ZeroExtend(imm8:'00', 10, 32);
+ access = MakeMemoryAccess(Sp, imm32, 1, 0)
+
+ }
+
+}
+
+@encoding(T3) {
+
+ @word 1 1 1 1 1 0 0 0 1 1 0 0 Rn(4) Rt(4) imm12(12)
+
+ @syntax "str.W" <Rgt> <access>
+
+ @conv {
+
+ Rgt = Register(Rt)
+ Rgn = Register(Rn)
+ imm32 = ZeroExtend(imm12, 12, 32);
+ access = MakeMemoryAccess(Rgn, imm32, 1, 0)
+
+ }
+
+ @rules {
+
+ //if Rn == '1111' then UNDEFINED;
+ //if t == 15 then UNPREDICTABLE;
+
+ }
+
+}
+
+@encoding(T41) {
+
+ @word 1 1 1 1 1 0 0 0 0 1 0 0 Rn(4) Rt(4) 1 1 U(1) W(1) imm8(8)
+
+ @syntax <Rgt> <access>
+
+ @conv {
+
+ Rgt = Register(Rt)
+ Rgn = Register(Rn)
+ imm32 = ZeroExtend(imm8, 8, 32);
+ access = MakeMemoryAccess(Rgn, imm32, U, W)
+
+ }
+
+ @rules {
+
+ //if P == '1' && U == '1' && W == '0' then SEE STRT;
+ //if Rn == '1101' && P == '1' && U == '0' && W == '1' && imm8 == '00000100' then SEE PUSH;
+ //if Rn == '1111' || (P == '0' && W == '0') then UNDEFINED;
+ //if t == 15 || (wback && n == t) then UNPREDICTABLE;
+
+ }
+
+}
+
+@encoding(T42) {
+
+ @word 1 1 1 1 1 0 0 0 0 1 0 0 Rn(4) Rt(4) 1 0 U(1) W(1) imm8(8)
+
+ @syntax <Rgt> <base> <offset>
+
+ @conv {
+
+ Rgt = Register(Rt)
+ Rgn = Register(Rn)
+ imm32 = ZeroExtend(imm8, 8, 32);
+ base = MakeMemoryNotIndexed(Rgn, W)
+ offset = MakeAccessOffset(U, imm32)
+
+ }
+
+ @rules {
+
+ //if P == '1' && U == '1' && W == '0' then SEE STRT;
+ //if Rn == '1101' && P == '1' && U == '0' && W == '1' && imm8 == '00000100' then SEE PUSH;
+ //if Rn == '1111' || (P == '0' && W == '0') then UNDEFINED;
+ //if t == 15 || (wback && n == t) then UNPREDICTABLE;
+
+ }
+
+}
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