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authorCyrille Bagard <nocbos@gmail.com>2018-05-28 20:34:24 (GMT)
committerCyrille Bagard <nocbos@gmail.com>2018-05-28 20:34:24 (GMT)
commit5311a943dffcc410739509b9215ca464f6d1e54c (patch)
tree9c34b5176606aa7bb3dcfb5970a20e3f9b27f1c3 /plugins/arm/v7/opdefs/ubfx_A88246.d
parent9f5ed46de568d3db882c939c8ca9d0117bff3369 (diff)
Included support for ARMv7 system instructions.
Diffstat (limited to 'plugins/arm/v7/opdefs/ubfx_A88246.d')
-rw-r--r--plugins/arm/v7/opdefs/ubfx_A88246.d87
1 files changed, 0 insertions, 87 deletions
diff --git a/plugins/arm/v7/opdefs/ubfx_A88246.d b/plugins/arm/v7/opdefs/ubfx_A88246.d
deleted file mode 100644
index 3fe25c7..0000000
--- a/plugins/arm/v7/opdefs/ubfx_A88246.d
+++ /dev/null
@@ -1,87 +0,0 @@
-
-/* Chrysalide - Outil d'analyse de fichiers binaires
- * ##FILE## - traduction d'instructions ARMv7
- *
- * Copyright (C) 2017 Cyrille Bagard
- *
- * This file is part of Chrysalide.
- *
- * Chrysalide is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3 of the License, or
- * (at your option) any later version.
- *
- * Chrysalide is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with Chrysalide. If not, see <http://www.gnu.org/licenses/>.
- */
-
-
-@title UBFX
-
-@id 245
-
-@desc {
-
- Unsigned Bit Field Extract extracts any number of adjacent bits at any position from a register, zero-extends them to 32 bits, and writes the result to the destination register.
-
-}
-
-@encoding (T1) {
-
- @word 1 1 1 1 0 0 1 1 1 1 0 0 Rn(4) 0 imm3(3) Rd(4) imm2(2) 0 widthm1(5)
-
- @syntax {
-
- @subid 732
-
- @conv {
-
- reg_D = Register(Rd)
- reg_N = Register(Rn)
- lsbit = UInt(imm3:imm2)
- widthminus1 = UInt(widthm1)
- width = MinusBitDiff(widthminus1, lsbit)
-
- }
-
- @asm ubfx reg_D reg_N lsbit width
-
- }
-
-}
-
-@encoding (A1) {
-
- @word cond(4) 0 1 1 1 1 1 1 widthm1(5) Rd(4) lsb(5) 1 0 1 Rn(4)
-
- @syntax {
-
- @subid 733
-
- @conv {
-
- reg_D = Register(Rd)
- reg_N = Register(Rn)
- lsbit = UInt(lsb)
- widthminus1 = UInt(widthm1)
- width = MinusBitDiff(widthminus1, lsbit)
-
- }
-
- @asm ubfx reg_D reg_N lsbit width
-
- @rules {
-
- check g_arm_instruction_set_cond(cond)
-
- }
-
- }
-
-}
-